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Sriram Govindarajan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Naren Narasimhan, Vinoo Srinivasan, Madhavi Vootukuru, Jeffrey Walrath, Sriram Govindarajan, Ranga Vemuri
    Rapid Prototyping of Reconfigurable Coprocessors. [Citation Graph (0, 0)][DBLP]
    ASAP, 1996, pp:303-312 [Conf]
  2. Meenakshi Kaul, Ranga Vemuri, Sriram Govindarajan, Iyad Ouaiss
    An Automated Temporal Partitioning and Loop Fission Approach for FPGA Based Reconfigurable Synthesis of DSP Applications. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:616-622 [Conf]
  3. Sriram Govindarajan, Ranga Vemuri
    Improving the Schedule Quality of Static-List Time-Constrained Scheduling. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:749- [Conf]
  4. Sriram Govindarajan, Iyad Ouaiss, Meenakshi Kaul, Vinoo Srinivasan, Ranga Vemuri
    An Effective Design System for Dynamically Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:312-313 [Conf]
  5. Sriram Govindarajan, Ranga Vemuri
    Tightly Integrated Design Space Exploration with Spatial and Temporal Partitioning in SPARCS. [Citation Graph (0, 0)][DBLP]
    FPL, 2000, pp:7-18 [Conf]
  6. Sriram Govindarajan, Ranga Vemuri
    Dynamic Bounding of Successor Force Computations in the Force Directed List Scheduling Algorithms. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:752-757 [Conf]
  7. Preetham Lakshmikanthan, Sriram Govindarajan, Vinoo Srinivasan, Ranga Vemuri
    Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints. [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:924-931 [Conf]
  8. Iyad Ouaiss, Sriram Govindarajan, Vinoo Srinivasan, Meenakshi Kaul, Ranga Vemuri
    An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:31-36 [Conf]
  9. Sriram Govindarajan, Vinoo Srinivasan, Preetham Lakshmikanthan, Ranga Vemuri
    A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:212-219 [Conf]
  10. Sujatha Sundararaman, Sriram Govindarajan, Ranga Vemuri
    Application Specific Macro Based Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:317-0 [Conf]
  11. Naren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri
    Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2001, v:19, n:3, pp:237-273 [Journal]

  12. Cone-based clustering heuristic for list-scheduling algorithms. [Citation Graph (, )][DBLP]

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