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Brent E. Nelson :
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Knuth Stener Grimsrud , James K. Archibald , Brent E. Nelson Multiple Prefetch Adaptive Disk Caching. [Citation Graph (1, 7)][DBLP ] IEEE Trans. Knowl. Data Eng., 1993, v:5, n:1, pp:88-103 [Journal ] Brent E. Nelson The Mythical CCM: In Search of Usable (and Resuable) FPGA-Based General Computing Machines. [Citation Graph (0, 0)][DBLP ] ASAP, 2006, pp:5-14 [Conf ] Tony M. Carter , Alan L. Davis , Alan B. Hayes , Gary Lindstrom , Dan Klass , Mike P. Maloney , Brent E. Nelson , Elliott I. Organick , Kent F. Smith Transforming an Ada Program Unit to Silicon and Testing It in an Ada Environment. [Citation Graph (0, 0)][DBLP ] COMPCON, 1984, pp:448-455 [Conf ] Knuth Stener Grimsrud , James K. Archibald , Richard L. Frost , Brent E. Nelson On the Accuracy of Memory Reference Models. [Citation Graph (0, 0)][DBLP ] Computer Performance Evaluation, 1994, pp:369-388 [Conf ] Brad L. Hutchings , Brent E. Nelson Using general-purpose programming languages for FPGA design. [Citation Graph (0, 0)][DBLP ] DAC, 2000, pp:561-566 [Conf ] Bryan C. Catanzaro , Brent E. Nelson Higher Radix Floating-Point Representations for FPGA-Based Arithmetic. [Citation Graph (0, 0)][DBLP ] FCCM, 2005, pp:161-170 [Conf ] Paul Graham , Brad L. Hutchings , Brent E. Nelson Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. [Citation Graph (0, 0)][DBLP ] FCCM, 2000, pp:305-306 [Conf ] Paul Graham , Brent E. Nelson Frequency-Domain Sonar Processing in FPGAs and DSPs. [Citation Graph (0, 0)][DBLP ] FCCM, 1998, pp:306-307 [Conf ] Brad L. Hutchings , Peter Bellows , Joseph Hawkins , K. Scott Hemmert , Brent E. Nelson , Mike Rytting A CAD Suite for High-Performance FPGA Design. [Citation Graph (0, 0)][DBLP ] FCCM, 1999, pp:12-24 [Conf ] Xiaojun Wang , Brent E. Nelson Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs. [Citation Graph (0, 0)][DBLP ] FCCM, 2003, pp:195-0 [Conf ] Stephen M. Scalera , Mark Falco , Brent E. Nelson A Reconfigurable Computing Architecture for Microsensors. [Citation Graph (0, 0)][DBLP ] FCCM, 2000, pp:59-67 [Conf ] Anthony L. Slade , Brent E. Nelson , Brad L. Hutchings Reconfigurable Computing Application Frameworks. [Citation Graph (0, 0)][DBLP ] FCCM, 2003, pp:251-0 [Conf ] Bryan C. Catanzaro , Brent E. Nelson Choice of base revisited: higher radices for FPGA-based floating-point computation (abstract only). [Citation Graph (0, 0)][DBLP ] FPGA, 2005, pp:279- [Conf ] Paul Graham , Brent E. Nelson FPGA-Based Sonar Processing. [Citation Graph (0, 0)][DBLP ] FPGA, 1998, pp:201-208 [Conf ] Gregory C. Ahlquist , Brent E. Nelson , Michael Rice Optimal Finite Field Multipliers for FPGAs. [Citation Graph (0, 0)][DBLP ] FPL, 1999, pp:51-60 [Conf ] Clint Hilton , Brent E. Nelson A Flexible Circuit-Switched NOC for FPGA-Based Systems. [Citation Graph (0, 0)][DBLP ] FPL, 2005, pp:191-196 [Conf ] Paul Graham , Brent E. Nelson A Hardware Genetic Algorithm for the Travelling Salesman Problem on SPLASH 2. [Citation Graph (0, 0)][DBLP ] FPL, 1995, pp:352-361 [Conf ] Paul Graham , Brent E. Nelson Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing. [Citation Graph (0, 0)][DBLP ] FPL, 1999, pp:1-10 [Conf ] Joseph Palmer , Brent E. Nelson A Parallel FFT Architecture for FPGAs. [Citation Graph (0, 0)][DBLP ] FPL, 2004, pp:948-953 [Conf ] Alexandra Poetter , Jesse Hunter , Cameron Patterson , Peter M. Athanas , Brent E. Nelson , Neil Steiner JHDLBits: The Merging of Two Worlds. [Citation Graph (0, 0)][DBLP ] FPL, 2004, pp:414-423 [Conf ] Eric Roesler , Brent E. Nelson Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture. [Citation Graph (0, 0)][DBLP ] FPL, 2002, pp:637-646 [Conf ] Timothy Wheeler , Paul Graham , Brent E. Nelson , Brad L. Hutchings Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. [Citation Graph (0, 0)][DBLP ] FPL, 2001, pp:483-492 [Conf ] J. Kelly Flanagan , Brent E. Nelson , James K. Archibald , Knuth Stener Grimsrud Incomplete Trace Data and Trace Driven Simulation. [Citation Graph (0, 0)][DBLP ] MASCOTS, 1993, pp:203-209 [Conf ] J. Kelly Flanagan , Brent E. Nelson , James K. Archibald , Gregory D. Thompson The Inaccuracy of Trace-Driven Simulation Using Incomplete Mulitprogramming Trace Data. [Citation Graph (0, 0)][DBLP ] MASCOTS, 1996, pp:37-43 [Conf ] Brent E. Nelson , Gregory D. Thompson , J. Kelly Flanagan Transaction Processing Workloads - A Comparison to the SPEC Benchmarks Using Memory Hierarchy Performance Studies. [Citation Graph (0, 0)][DBLP ] MASCOTS, 1996, pp:152-156 [Conf ] Zhaoyi Wei , Dah-Jye Lee , Brent E. Nelson , Michael Martineau A Fast and Accurate Tensor-based Optical Flow Algorithm Implemented in FPGA. [Citation Graph (0, 0)][DBLP ] WACV, 2007, pp:18- [Conf ] Brad L. Hutchings , Brent E. Nelson , Michael J. Wirthlin Designing and Debugging Custom Computing Applications. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2000, v:17, n:1, pp:20-28 [Journal ] Robert B. Smith , James K. Archibald , Brent E. Nelson Evaluating Performance of Prefetching Second Level Caches. [Citation Graph (0, 0)][DBLP ] SIGMETRICS Performance Evaluation Review, 1993, v:20, n:4, pp:31-42 [Journal ] Elliott I. Organick , Tony M. Carter , Mike P. Maloney , Alan L. Davis , Alan B. Hayes , Dan Klass , Gary Lindstrom , Brent E. Nelson , Kent F. Smith Transforming an Ada Program Unit to Silicon and Verifying Its Behavior in an Ada Environment: A first Experiment. [Citation Graph (0, 0)][DBLP ] IEEE Software, 1984, v:1, n:1, pp:31-49 [Journal ] Knuth Stener Grimsrud , James K. Archibald , Richard L. Frost , Brent E. Nelson Locality as a Visualization Tool. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:11, pp:1319-1326 [Journal ] Zhaoyi Wei , Dah-Jye Lee , Brent E. Nelson A Hardware-Friendly Adaptive Tensor Based Optical Flow Algorithm. [Citation Graph (0, 0)][DBLP ] ISVC (2), 2007, pp:43-51 [Conf ] Brad L. Hutchings , Brent E. Nelson Unifying simulation and execution in a design environment for FPGA systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2001, v:9, n:1, pp:201-205 [Journal ] Design Productivity for Configurable Computing. [Citation Graph (, )][DBLP ] Real-Time Optical Flow Calculations on FPGA and GPU Architectures: A Comparison Study. [Citation Graph (, )][DBLP ] Optical Flow on the Ambric Massively Parallel Processor Array (MPPA). [Citation Graph (, )][DBLP ] Comparing fine-grained performance on the Ambric MPPA against an FPGA. [Citation Graph (, )][DBLP ] Real-time accurate optical flow-based motion sensor. [Citation Graph (, )][DBLP ] Accurate Optical Flow Sensor for Obstacle Avoidance. [Citation Graph (, )][DBLP ] Performance analysis of inclusion effects in multi-level multiprocessor caches. [Citation Graph (, )][DBLP ] FPGA Design Productivity - A Discussion of the State of the Art and a Research Agenda. [Citation Graph (, )][DBLP ] Search in 0.003secs, Finished in 0.305secs