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Eugene John: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Byeong Kil Lee, Lizy Kurian John, Eugene John
    Architectural Support for Accelerating Congestion Control Applications in Network Processors. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:169-178 [Conf]
  2. Pradeep Nair, Eugene John
    Performance of Sequence Alignment Bioinformatics Applications on General Purpose Processors: A Case Study. [Citation Graph (0, 0)][DBLP]
    BIOCOMP, 2006, pp:556-559 [Conf]
  3. Pradeep Nair, Dhireesha Kudithipudi, Eugene John, Fred Hudson
    Performance Analysis of Embedded Applications on a Pentium-4 Based Machine. [Citation Graph (0, 0)][DBLP]
    ESA, 2006, pp:191-197 [Conf]
  4. R. Shalem, Lizy Kurian John, Eugene John
    A Novel Low Power Energy Recovery Full Adder Cell. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:380-0 [Conf]
  5. Lizy Kurian John, Daniel Brewer, Eugene John
    Design of a highly reconfigurable interconnect for array processors. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:321-325 [Conf]
  6. Dhireesha Kudithipudi, R. Kotha, Eugene John, Z. Pantic-Tanner
    Impact of nanotechnology on the performance of CMOS digital multipliers. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2004, pp:439-442 [Conf]
  7. Dhireesha Kudithipudi, Eugene John
    Parametrical characterization of leakage power in embedded system caches using gated-VSS. [Citation Graph (0, 0)][DBLP]
    Circuits, Signals, and Systems, 2005, pp:308-312 [Conf]
  8. Byeong Kil Lee, Lizy Kurian John, Eugene John
    Architectural enhancements for network congestion control applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:6, pp:609-615 [Journal]
  9. Dhireesha Kudithipudi, Eugene John
    Implementation of Low Power Digital Multipliers using 10 -Transistor Adder Blocks. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2005, v:1, n:3, pp:286-296 [Journal]

  10. Performance Analysis of an Intel Pentium-4 Based Personal Computer for Multiplke Sequence Alignment. [Citation Graph (, )][DBLP]

  11. Effects of Register File Organization on Leakage Power Consumption. [Citation Graph (, )][DBLP]

  12. Performance Measurement of Single, Dual and Quad Core Machines Using SPEC CPU2006. [Citation Graph (, )][DBLP]

  13. Energy Efficiency of Data Compression with Wavelets. [Citation Graph (, )][DBLP]

  14. A Tale of Two Processors: Revisiting the RISC-CISC Debate. [Citation Graph (, )][DBLP]

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