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Publications of Author

1. Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson
   An FPGA-Based Application-Specific Processor for Efficient Reduction of Multiple Variable-Length Floating-Point Data Sets. [Citation Graph (0, 0)][DBLP]
   ASAP, 2006, pp:323-330 [Conf]
   
2. Gerald R. Morris, Ling Zhuo, Viktor K. Prasanna
   High-Performance FPGA-Based General Reduction Methods. [Citation Graph (0, 0)][DBLP]
   FCCM, 2005, pp:323-324 [Conf]
   
3. Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson
   A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer. [Citation Graph (0, 0)][DBLP]
   FCCM, 2006, pp:3-12 [Conf]
   
4. Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna
   Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2005, pp:- [Conf]
   
5. Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna
   High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Parallel Distrib. Syst., 2007, v:18, n:10, pp:1377-1392 [Journal]
   
6. 
   An FPGA-Based Floating-Point Jacobi Iterative Solver. [Citation Graph (, )][DBLP]
   
   
7. 
   Sparse Matrix Computations on Reconfigurable Hardware. [Citation Graph (, )][DBLP]