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Hanno Scharwächter: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Md. Mostafizur Rahman Mozumdar, Kingshuk Karuri, Anupam Chattopadhyay, Stefan Kraemer, Hanno Scharwächter, Heinrich Meyr, Gerd Ascheid, Rainer Leupers
    Instruction Set Customization of Application Specific Processors for Network Processing: A Case Study. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:154-160 [Conf]
  2. Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwächter, Rainer Leupers, Heinrich Meyr
    A novel approach for flexible and consistent ADL-driven ASIP design. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:717-722 [Conf]
  3. Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren
    A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1276-1283 [Conf]
  4. Hanno Scharwächter, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
    An interprocedural code optimization technique for network processors using hardware multi-threading support. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:919-924 [Conf]
  5. Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
    ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study. [Citation Graph (0, 0)][DBLP]
    SCOPES, 2004, pp:33-46 [Conf]
  6. Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
    ASIP architecture exploration for efficient IPSec encryption: A case study. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:2, pp:- [Journal]

  7. Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves. [Citation Graph (, )][DBLP]


  8. A code-generator generator for multi-output instructions. [Citation Graph (, )][DBLP]


  9. MAPS: an integrated framework for MPSoC application parallelization. [Citation Graph (, )][DBLP]


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