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Christian Plessl: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Christian Plessl, Marco Platzner
    Zippy - A coarse-grained reconfigurable array with support for hardware virtualization. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:213-218 [Conf]
  2. Rolf Enzler, Christian Plessl, Marco Platzner
    Co-Simulation of a Hybrid Multi-Context Architecture. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:174-180 [Conf]
  3. Christian Plessl, Marco Platzner
    Virtualization of Hardware - Introduction and Survey. [Citation Graph (0, 0)][DBLP]
    ERSA, 2004, pp:63-69 [Conf]
  4. Christian Plessl, Marco Platzner
    Custom Computing Machines for the Set Covering Problem. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:163-172 [Conf]
  5. Matthias Dyer, Christian Plessl, Marco Platzner
    Partially Reconfigurable Cores for Xilinx Virtex. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:292-301 [Conf]
  6. Rolf Enzler, Christian Plessl, Marco Platzner
    Virtualizing Hardware with Multi-context Reconfigurable Arrays. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:151-160 [Conf]
  7. Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele
    Reconfigurable Hardware in Wearable Computing Nodes. [Citation Graph (0, 0)][DBLP]
    ISWC, 2002, pp:215-222 [Conf]
  8. Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, Gerhard Tröster
    The case for reconfigurable hardware in wearable computing. [Citation Graph (0, 0)][DBLP]
    Personal and Ubiquitous Computing, 2003, v:7, n:5, pp:299-308 [Journal]
  9. Christian Plessl, Marco Platzner
    Instance-Specific Accelerators for Minimum Covering. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2003, v:26, n:2, pp:109-129 [Journal]
  10. Rolf Enzler, Christian Plessl, Marco Platzner
    System-level performance evaluation of reconfigurable processors. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:2-3, pp:63-73 [Journal]

  11. A Hardware Accelerator for k-th Nearest Neighbor Thinning. [Citation Graph (, )][DBLP]

  12. Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX. [Citation Graph (, )][DBLP]

  13. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. [Citation Graph (, )][DBLP]

  14. An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure. [Citation Graph (, )][DBLP]

  15. Demo abstract: Operating a sensor network at 3500 m above sea level. [Citation Graph (, )][DBLP]

  16. PermaDAQ: A scientific instrument for precision sensing and data recovery in environmental extremes. [Citation Graph (, )][DBLP]

  17. EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks. [Citation Graph (, )][DBLP]

  18. Increasing the reliability of wireless sensor networks with a distributed testing framework. [Citation Graph (, )][DBLP]

  19. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. [Citation Graph (, )][DBLP]

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