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Greg Snider:
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Publications of Author
- Robert Schreiber, Shail Aditya, B. Ramakrishna Rau, Vinod Kathail, Scott A. Mahlke, Santosh G. Abraham, Greg Snider
High-Level Synthesis of Nonprogrammable Hardware Accelerators. [Citation Graph (0, 0)][DBLP] ASAP, 2000, pp:113-0 [Conf]
- Barry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider
High-Performance Cellular Automata Random Number Generators for Embedded Probabilistic Computing Systems. [Citation Graph (0, 0)][DBLP] Evolvable Hardware, 2002, pp:191-200 [Conf]
- Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider
Teramac-configurable custom computing. [Citation Graph (0, 0)][DBLP] FCCM, 1995, pp:32-38 [Conf]
- W. Bruce Culbertson, Rick Amerson, Richard J. Carter, Philip Kuekes, Greg Snider
Defect tolerance on the Teramac custom computer. [Citation Graph (0, 0)][DBLP] FCCM, 1997, pp:116-124 [Conf]
- Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider, Lyle Albertson
Plasma: An FPGA for Million Gate Systems. [Citation Graph (0, 0)][DBLP] FPGA, 1996, pp:10-16 [Conf]
- Barry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider
FPGA implementation of neighborhood-of-four cellular automata random number generators. [Citation Graph (0, 0)][DBLP] FPGA, 2002, pp:106-112 [Conf]
- Greg Snider
Performance-constrained pipelining of software loops onto reconfigurable hardware. [Citation Graph (0, 0)][DBLP] FPGA, 2002, pp:177-186 [Conf]
- Greg Snider, Barry Shackleford, Richard J. Carter
Attacking the semantic gap between application programming languages and configurable hardware. [Citation Graph (0, 0)][DBLP] FPGA, 2001, pp:115-124 [Conf]
- Greg Snider, Philip Kuekes, W. Bruce Culbertson, Richard J. Carter, Arnold S. Berger, Rick Amerson
The Teramac Configurable Computer Engine. [Citation Graph (0, 0)][DBLP] FPL, 1995, pp:44-53 [Conf]
- Urs Kanus, Michael Meißner, Wolfgang Straßer, Hanspeter Pfister, Arie E. Kaufman, Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider
Implementations of cube-4 on the teramac custom computing machine. [Citation Graph (0, 0)][DBLP] Computers & Graphics, 1997, v:21, n:2, pp:199-208 [Journal]
- Barry Shackleford, Greg Snider, Richard J. Carter, Etsuko Okushi, Mitsuhiro Yasuda, Katsuhiko Seo, Hiroto Yasuura
A High-Performance, Pipelined, FPGA-Based Genetic Algorithm Machine. [Citation Graph (0, 0)][DBLP] Genetic Programming and Evolvable Machines, 2001, v:2, n:1, pp:33-60 [Journal]
- Tad Hogg, Greg Snider
Defect-tolerant Logic with Nanoscale Crossbar Circuits. [Citation Graph (0, 0)][DBLP] J. Electronic Testing, 2007, v:23, n:2-3, pp:117-129 [Journal]
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