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J. Rose :
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A. Ye , J. Rose Using Bus-Based Connections to Improve Field-Programmable Gate-Array Density for Implementing Datapath Circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2006, v:14, n:5, pp:462-473 [Journal ] P. Chow , Soon Ong Seo , J. Rose , K. Chung , G. Paez-Monzon , I. Rahardja The design of an SRAM-based field-programmable gate array. I. Architecture. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1999, v:7, n:2, pp:191-197 [Journal ] P. Chow , Soon Ong Seo , J. Rose , K. Chung , G. Paez-Monzon , I. Rahardja The design of a SRAM-based field-programmable gate array-Part II: Circuit design and layout. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1999, v:7, n:3, pp:321-330 [Journal ] A review of wafer bonding materials and characterizations to enable wafer thinning, backside processing, and laser dicing. [Citation Graph (, )][DBLP ] Search in 0.001secs, Finished in 0.001secs