The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Search the dblp DataBase

Title:
Author:
Sebastian Siegel: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sebastian Siegel, Renate Merker
    Optimized Data-Reuse in Processor Arrays. [Citation Graph (0, 0)][DBLP]
    ASAP, 2004, pp:315-325 [Conf]
  2. Sebastian Siegel, Renate Merker
    Minimum Cost for Channels and Registers in Processor Arrays by Avoiding Redundancy. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:28-32 [Conf]
  3. Sebastian Siegel, Renate Merker
    Efficient Realization of Data Dependencies in Algorithm Partitioning Under Resource Constraints. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2006, pp:1181-1191 [Conf]
  4. Markus Rullmann, Sebastian Siegel, Renate Merker
    Optimization of Reconfiguration Overhead by Algorithmic Transformations and Hardware Matching. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  5. Mathias Kortke, Jan Müller, Rainer Schaffer, Sebastian Siegel, Renate Merker, Jürgen Kelber
    A Parallel Hardware-Software System for Signal Processing Algorithms. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2004, pp:215-220 [Conf]
  6. Sebastian Siegel, Renate Merker
    Algorithm Partitioning including Optimized Data-Reuse for Processor Arrays. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2004, pp:85-90 [Conf]
  7. Sebastian Siegel, Rainer Schaffer, Renate Merker
    Efficient Realization of the Edge Detection Algorithm on a Processor Array with Parallelism on Two Levels. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2006, pp:173-180 [Conf]
  8. Frank Hannig, Hritam Dutta, Alexey Kupriyanov, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Ronan Keryell, Bernard Pottier, Daniel Chillet, Daniel Menard, Olivier Sentieys
    Co-Design of Massively Parallel Embedded Processor Architectures. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2005, pp:27-34 [Conf]
  9. Hritam Dutta, Frank Hannig, Alexey Kupriyanov, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Bernard Pottier
    Massively Parallel Processor Architectures: A Co-design Approach. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2007, pp:61-68 [Conf]

Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002