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Jos T. J. van Eijndhoven: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven
    Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor. [Citation Graph (0, 0)][DBLP]
    ASAP, 2003, pp:250-259 [Conf]
  2. Pieter van der Wolf, W. M. Kruijtzer, Jos T. J. van Eijndhoven
    T2: System-Level Design of Embedded Media Systems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:14-15 [Conf]
  3. Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven
    Static cache partitioning robustness analysis for embedded on-chip multi-processors. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2006, pp:353-360 [Conf]
  4. Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol
    Design of multi-tasking coprocessor control for Eclipse. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:139-144 [Conf]
  5. Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Cotofana, Jos T. J. van Eijndhoven
    Compositional Memory Systems for Data Intensive Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:728-729 [Conf]
  6. Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven
    Compositional Memory Systems for Multimedia Communicating Tasks. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:932-937 [Conf]
  7. Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven
    Compositional, efficient caches for a chip multi-processor. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:345-350 [Conf]
  8. Andrei Terechko, Evert-Jan D. Pol, Jos T. J. van Eijndhoven
    PRMDL: a machine description language for clustered VLIW architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:821- [Conf]
  9. Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol
    Robust Media Processing in a Flexible and Cost-Effective Network of Multi-Tasking Coprocessors. [Citation Graph (0, 0)][DBLP]
    ECRTS, 2002, pp:223-230 [Conf]
  10. Martijn J. Rutten, Om Prakash Gangwal, Jos T. J. van Eijndhoven, Egbert G. T. Jaspers, Evert-Jan D. Pol
    Application design trajectory towards reusable coprocessors MPEG case study. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2004, pp:33-38 [Conf]
  11. Ed P. Huijbregts, Jos T. J. van Eijndhoven, Jochen A. G. Jess
    On Design Rule Correct Maze Routing. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:407-411 [Conf]
  12. Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:261-0 [Conf]
  13. Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven, Kees A. Vissers
    Field-Programmable Custom Computing Machines - A Taxonomy -. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:79-88 [Conf]
  14. Andrei Terechko, Erwan Le Thenaff, Manish Garg, Jos T. J. van Eijndhoven, Henk Corporaal
    Inter-Cluster Communication Models for Clustered VLIW Processors. [Citation Graph (0, 0)][DBLP]
    HPCA, 2003, pp:354-364 [Conf]
  15. H. M. A. M. Arts, Jos T. J. van Eijndhoven, Leon Stok
    Flexible Block-Multiplier Generation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:106-109 [Conf]
  16. Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishnan
    Speculative Trace Scheduling in VLIW Processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:408-413 [Conf]
  17. Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-Jan D. Pol, P. Struik, R. H. J. Bloks, Pieter van der Wolf, Harald P. E. Vranken, Frans Sijstermans, M. J. A. Tromp, Andy D. Pimentel
    TriMedia CPU64 Architecture. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:586-592 [Conf]
  18. Evert-Jan D. Pol, Bas Aarts, Jos T. J. van Eijndhoven, P. Struik, Pieter van der Wolf, Frans Sijstermans, M. J. A. Tromp, Jan-Willem van de Waerdt
    TriMedia CPU64 Application Development Environment. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:593-598 [Conf]
  19. Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:425-430 [Conf]
  20. J. F. M. Theeuwen, H. M. A. M. Arts, Jos T. J. van Eijndhoven, H. J. H. Sleuters, J. H. P. Wijdeven
    Module Generation in an Architectural Synthesis Environment. [Citation Graph (0, 0)][DBLP]
    Synthesis for Control Dominated Circuits, 1992, pp:359-371 [Conf]
  21. Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol, Egbert G. T. Jaspers, Pieter van der Wolf, Om Prakash Gangwal, Adwin H. Timmer
    Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  22. Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, Jos T. J. van Eijndhoven, Jochen A. G. Jess
    A Constructive Method for Exploiting Code Motion. [Citation Graph (0, 0)][DBLP]
    ISSS, 1996, pp:51-56 [Conf]
  23. Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishnan
    On the Benefits of Speculative Trace Scheduling in VLIW Processors. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:822-828 [Conf]
  24. Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven
    A 2D Addressing Mode for Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:291-306 [Conf]
  25. Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:224-241 [Conf]
  26. Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van Eijndhoven, Anshul Kumar
    Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:177-182 [Conf]
  27. Pieter van der Wolf, W. M. Kruijtzer, Jos T. J. van Eijndhoven
    System-Level Design of Embedded Media Systems (Tutorial Abstract). [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:14-15 [Conf]
  28. Martijn J. Rutten, Jos T. J. van Eijndhoven, Egbert G. T. Jaspers, Pieter van der Wolf, Evert-Jan D. Pol, Om Prakash Gangwal, Adwin H. Timmer
    A Heterogeneous Multiprocessor Architecture for Flexible Media Processing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:4, pp:39-50 [Journal]
  29. Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven
    Hardwired MPEG-4 repetitive padding. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Multimedia, 2005, v:7, n:2, pp:261-268 [Journal]
  30. Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers
    Pel reconstruction on FPGA-augmented TriMedia. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:6, pp:622-635 [Journal]
  31. Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven
    Throughput optimization via cache partitioning for embedded multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2006, pp:185-192 [Conf]
  32. Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven
    Compositional Memory Systems for Multimedia Communicating Tasks [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

  33. Multirate integration in a direct simulation method. [Citation Graph (, )][DBLP]


  34. PLATO: a new piecewise linear simulation tool. [Citation Graph (, )][DBLP]


  35. 2D-to-3D TV Image Mapping on TriMedias. [Citation Graph (, )][DBLP]


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