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Ang-Chih Hsieh:
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- Chi Ta Wu, Ang-Chih Hsieh, TingTing Hwang
Instruction buffering for nested loops in low-power design. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2006, v:14, n:7, pp:780-784 [Journal]
- Ang-Chih Hsieh, Tzu-Teng Lin, Tsuang-Wei Chang, TingTing Hwang
A functionality-directed clustering technique for low-power MTCMOS design - computation of simultaneously discharging current. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]
Thermal-aware memory mapping in 3D designs. [Citation Graph (, )][DBLP]
TSV redundancy: Architecture and design issues in 3D IC. [Citation Graph (, )][DBLP]
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