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Publications of Author

1. Andreas Wieferink, Tim Kogel, Achim Nohl, Andreas Hoffmann
   Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization. [Citation Graph (0, 0)][DBLP]
   ASAP, 2003, pp:161-171 [Conf]
   
2. Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens
   A modular simulation framework for architectural exploration of on-chip interconnection networks. [Citation Graph (0, 0)][DBLP]
   CODES+ISSS, 2003, pp:7-12 [Conf]
   
3. Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel
   Retargetable generation of TLM bus interfaces for MP-SoC platforms. [Citation Graph (0, 0)][DBLP]
   CODES+ISSS, 2005, pp:249-254 [Conf]
   
4. Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Achim Nohl
   Processor/Memory Co-Exploration on Multiple Abstraction Levels. [Citation Graph (0, 0)][DBLP]
   DATE, 2003, pp:10966-10973 [Conf]
   
5. Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl
   A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:1256-1263 [Conf]
   
6. Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
   Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. [Citation Graph (0, 0)][DBLP]
   SAMOS, 2004, pp:138-148 [Conf]
   
7. Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
   Early ISS Integration into Network-on-Chip Designs. [Citation Graph (0, 0)][DBLP]
   SAMOS, 2004, pp:443-452 [Conf]
   
8. Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
   ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study. [Citation Graph (0, 0)][DBLP]
   SCOPES, 2004, pp:33-46 [Conf]
   
9. Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr
   A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:11, pp:1338-1354 [Journal]
   
10. Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
    ASIP architecture exploration for efficient IPSec encryption: A case study. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:2, pp:- [Journal]