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Fred G. Kuper:
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Publications of Author
- N. Tosic Golo, S. van der Wal, Fred G. Kuper, Ton J. Mouthaan
The time-voltage trade-off for ESD damage threshold in amorphous silicon hydrogenated thin-film transistors. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2001, v:41, n:9-10, pp:1391-1396 [Journal]
- Gianluca Boselli, Stan Meeuwsen, Ton J. Mouthaan, Fred G. Kuper
Investigations on double-diffused MOS transistors under ESD zap conditions. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2001, v:41, n:3, pp:395-405 [Journal]
- H. V. Nguyen, Cora Salm, R. Wenzel, A. J. Mouthaan, Fred G. Kuper
Simulation and experimental characterization of reservoir and via layout effects on electromigration lifetime. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2002, v:42, n:9-11, pp:1421-1425 [Journal]
- M. S. B. Sowariraj, Theo Smedes, Cora Salm, Ton J. Mouthaan, Fred G. Kuper
The influence of technology variation on ggNMOSTs and SCRs against CDM BSD stress. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2002, v:42, n:9-11, pp:1287-1292 [Journal]
- H. V. Nguyen, Cora Salm, J. Vroemen, J. Voets, B. Krabbenborg, J. Bisschop, A. J. Mouthaan, Fred G. Kuper
Fast temperature cycling and electromigration induced thin film cracking in multilevel interconnection: experiments and modeling. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2002, v:42, n:9-11, pp:1415-1420 [Journal]
- N. Tosic Golo, Fred G. Kuper, Ton J. Mouthaan
Zapping thin film transistors. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2002, v:42, n:4-5, pp:747-765 [Journal]
- Yuan Li, Klaas Jelle Veenstra, Jerôme Dubois, Lei Peters-Wu, Agnes van Zomeren, Fred G. Kuper
Reservoir effect and maximum allowed VIA misalignment for AlCu interconnect with tungsten VIA plug. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2003, v:43, n:9-11, pp:1449-1454 [Journal]
- M. S. B. Sowariraj, Theo Smedes, Cora Salm, Ton J. Mouthaan, Fred G. Kuper
Role of package parasitics and substrate resistance on the Charged Device Model (CDM) failure levels -An explanation and die protection strategy. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2003, v:43, n:9-11, pp:1569-1575 [Journal]
- Guoqiao Tao, Andrea Scarpa, Leo van Marwijk, Kitty van Dijk, Fred G. Kuper
Applying the fWLR concept to Stress induced leakage current in non-volatile memory processes. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2004, v:44, n:8, pp:1269-1273 [Journal]
- M. S. B. Sowariraj, Theo Smedes, Peter C. de Jong, Cora Salm, Ton J. Mouthaan, Fred G. Kuper
A 3-D Circuit Model to evaluate CDM performance of ICs. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2005, v:45, n:9-11, pp:1425-1429 [Journal]
- Cora Salm, A. J. Hof, Fred G. Kuper, J. Schmitz
Reduced temperature dependence of hot carrier degradation in deuterated nMOSFETs. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2006, v:46, n:9-11, pp:1617-1622 [Journal]
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