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Y. J. Su: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Y. S. Zheng, Y. J. Su, B. Yu, P. D. Foo
    Investigation of defect on copper bond pad surface in copper/low k process integration. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:8, pp:1311-1316 [Journal]
  2. H. Y. Li, Y. J. Su, C. F. Tsang, S. M. Sohan, V. N. Bliznetsov, L. Zhang
    Process improvement of 0.13mum Cu/Low K (Black DiamondTM) dual damascene interconnection. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:7-8, pp:1134-1143 [Journal]
  3. C. F. Tsang, C. K. Chang, A. Krishnamoorthy, K. Y. Ee, Y. J. Su, H. Y. Li, W. H. Li, L. Y. Wong
    A study of post-etch wet clean on electrical and reliability performance of Cu/low k interconnections. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:3-4, pp:517-525 [Journal]
  4. C. F. Tsang, C. Y. Li, A. Krishnamoorthy, Y. J. Su, H. Y. Li, L. Y. Wong, W. H. Li, L. J. Tang, K. Y. Ee
    Impact of barrier deposition process on electrical and reliability performance of Cu/CVD low k SiOCH metallization. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2004, v:35, n:9, pp:693-700 [Journal]
  5. C. F. Tsang, V. N. Bliznetsov, Y. J. Su
    Study and improvement of electrical performance of 130 nm Cu/CVD low k SiOCH interconnect related to via etch process. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:11, pp:1051-1058 [Journal]
  6. Y. J. Su, S. Arisawa, Y. Takano, A. Ishii, T. Hatano, K. Togano
    Study on the growth mechanism of Bi-2212 ribbon-like thin films on flat Ag substrate by the atomization technique. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:5-8, pp:679-681 [Journal]
  7. Y. S. Zheng, Q. Guo, Y. J. Su, P. D. Foo
    Polymer residue chemical composition analysis and its effect on via contact resistance in dual damascene copper interconnects process integration. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:2, pp:109-113 [Journal]

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