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Chantana Chantrapornchai: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chantana Chantrapornchai, Wanlop Surakumpolthorn, Edwin Hsing-Mean Sha
    Design Exploration Framework Under Impreciseness Based on Register-Constrained Inclusion Scheduling. [Citation Graph (0, 0)][DBLP]
    ASIAN, 2004, pp:78-92 [Conf]
  2. Chantana Chantrapornchai, Sissades Tongsima, Edwin Hsing-Mean Sha
    Rapid Prototyping Techniques for Fuzzy Controllers. [Citation Graph (0, 0)][DBLP]
    ASIAN, 1999, pp:37-49 [Conf]
  3. Chantana Chantrapornchai, Wanlop Surakumpolthorn, Edwin Hsing-Mean Sha
    Efficient Scheduling for Design Exploration with Imprecise Latency and Register Constraints. [Citation Graph (0, 0)][DBLP]
    EUC, 2004, pp:259-270 [Conf]
  4. Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Sharon Hu
    Efficient Algorithms for Finding Highly Acceptable Designs Based on Module-Utility Selections. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:128-131 [Conf]
  5. Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Hu
    Efficient algorithms for acceptable design exploration. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2000, pp:139-142 [Conf]
  6. Chantana Chantrapornchai, Sissades Tongsima, Edwin Hsing-Mean Sha
    Rapid Prototyping for Fuzzy Systems. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1996, pp:234-239 [Conf]
  7. Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Nelson L. Passos
    Scheduling with Confidence for Probabilistic Data-flow Graphs. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1997, pp:150-155 [Conf]
  8. Chantana Chantrapornchai
    Rapid Prototyping Methodology and Environments for Fuzzy Applications. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science, 2003, pp:940-949 [Conf]
  9. Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Nelson L. Passos
    Probabilistic Rotation: Scheduling Graphs with Uncertain Execution Time. [Citation Graph (0, 0)][DBLP]
    ICPP, 1997, pp:292-0 [Conf]
  10. Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapornchai, Peter M. Kogge
    Optimizing Data Scheduling on Processor-in-Memory Arrays. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:57-61 [Conf]
  11. Zili Shao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai
    Loop scheduling for minimizing schedule length and switching activities. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:109-112 [Conf]
  12. Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai
    An Integrated Framework of Design Optimization and Space Minimization for DSP applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:601-604 [Conf]
  13. Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Qingfeng Zhuge
    Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops. [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:144-149 [Conf]
  14. Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha
    Probabilistic Loop Scheduling Considering Communication Overhead. [Citation Graph (0, 0)][DBLP]
    JSSPP, 1998, pp:158-179 [Conf]
  15. Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai
    Analysis and Algorithms for Partitioning of Large-scale Adaptive Mobile Networks. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:302-308 [Conf]
  16. Chantana Chantrapornchai, Sissades Tongsima
    Resource Estimation Algorithm Under Impreciseness Using Inclusion Scheduling. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2001, v:12, n:5, pp:581-598 [Journal]
  17. Sissades Tongsima, Edwin Hsing-Mean Sha, Chantana Chantrapornchai, David R. Surma, Nelson L. Passos
    Probabilistic Loop Scheduling for Applications with Uncertain Execution Time. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:1, pp:65-80 [Journal]
  18. Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Sharon Hu
    Efficient design exploration based on module utility selection. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:1, pp:19-29 [Journal]

  19. Minimizing Video Data Using Looping Background Detection Technique. [Citation Graph (, )][DBLP]


  20. Fuzzy Application Parallelization Using OpenMP. [Citation Graph (, )][DBLP]


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