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Flávio Rech Wagner: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lisane B. de Brisolara, Leandro Buss Becker, Luigi Carro, Flávio Rech Wagner, Carlos Eduardo Pereira, Ricardo Reis
    Comparing high-level modeling approaches for embedded system design. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:986-989 [Conf]
  2. César A. M. Marcon, André Borin Suarez, Altamiro Amadeu Susin, Luigi Carro, Flávio Rech Wagner
    Time and energy efficient mapping of embedded applications onto NoCs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:33-38 [Conf]
  3. Lia Goldstein Golendziner, Flávio Rech Wagner, Carla Maria Dal Sasso Freitas, Vania Boklis, Karin Becker
    Representing Digital Systems as Complex Objects. [Citation Graph (0, 0)][DBLP]
    BTW, 1989, pp:295-299 [Conf]
  4. Flávio Rech Wagner
    Prevail-DM: A Framework-Based Environment for Formal Hardware Verification. [Citation Graph (0, 0)][DBLP]
    CHDL, 1993, pp:79-96 [Conf]
  5. Flávio Rech Wagner, Arnaldo Hilário Viegas de Lima
    Design Version Management in the GARDEN Framework. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:704-710 [Conf]
  6. Lia Goldstein Golendziner, Clesio Saraiva dos Santos, Flávio Rech Wagner
    Modelling an Engineering Design Application Using Extended Object-Oriented Concepts. [Citation Graph (0, 20)][DBLP]
    DASFAA, 1997, pp:343-352 [Conf]
  7. Luigi Carro, Márcio Eduardo Kreutz, Flávio Rech Wagner, Márcio Oyamada
    System Synthesis for Multiprocessor Embedded Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:697-702 [Conf]
  8. Mohamed-Anouar Dziri, Wander O. Cesário, Flávio Rech Wagner, Ahmed Amine Jerraya
    Unified Component Integration Flow for Multi-Processor SoC Design and Validation. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1132-1137 [Conf]
  9. Alex Panato, Sandro V. Silva, Flávio Rech Wagner, Marcelo O. Johann, Ricardo Reis, Sergio Bampi
    Design of Very Deep Pipelined Multipliers for FPGAs. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:52-57 [Conf]
  10. Sandro Neves Soares, Flávio Rech Wagner
    T&D-Bench+ - A Software Environment for Modeling and Simulation of State-of-the-Art Processors. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:362-369 [Conf]
  11. Flávio Rech Wagner, Lia Goldstein Golendziner, Jean Lacombe, Arnaldo Hilário Viegas de Lima
    Design Version Management in the STAR Framework. [Citation Graph (0, 0)][DBLP]
    Electronic Design Automation Frameworks, 1992, pp:85-97 [Conf]
  12. Lisane B. de Brisolara, Leandro Buss Becker, Luigi Carro, Flávio Rech Wagner, Carlos Eduardo Pereira
    Evaluating High-Level Models for Real-Time Embedded Systems Design. [Citation Graph (0, 0)][DBLP]
    DIPES, 2004, pp:277-286 [Conf]
  13. Luigi Carro, Flávio Rech Wagner, Márcio Eduardo Kreutz, Márcio Oyamada
    A Design Methodology for Embedded Systems based on Multiple Processors. [Citation Graph (0, 0)][DBLP]
    DIPES, 2000, pp:33-42 [Conf]
  14. Edgard de Faria Corrêa, Eduardo W. Basso, Gustavo R. Wilke, Flávio Rech Wagner, Luigi Carro
    The Implications of Real-Time Behavior in Networks-on-Chip Architectures. [Citation Graph (0, 0)][DBLP]
    DIPES, 2004, pp:307-316 [Conf]
  15. Júlio C. B. de Mattos, Lisane B. de Brisolara, Renato Fernandes Hentschke, Luigi Carro, Flávio Rech Wagner
    Design Space Exploration with Automatic Generation of IP-Based Embedded Software. [Citation Graph (0, 0)][DBLP]
    DIPES, 2004, pp:237-246 [Conf]
  16. Braulio Adriano de Mello, Flávio Rech Wagner
    A Standardized Co-simulation Backbone. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2001, pp:181-192 [Conf]
  17. João Cláudio Soares Otero, Flávio Rech Wagner
    An Object-Oriented Methodology for Modeling the Precise Behavior of Processor Architectures. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2001, pp:121-132 [Conf]
  18. Flávio Rech Wagner, Márcio Oyamada, Luigi Carro, Márcio Eduardo Kreutz
    Object-Oriented Modeling and Co-Simulation of Embedded Systems. [Citation Graph (0, 0)][DBLP]
    VLSI, 1999, pp:497-508 [Conf]
  19. João Cláudio Soares Otero, Flávio Rech Wagner, Luigi Carro
    Reconfiguration of embedded Java applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  20. Tales Heimfarth, Marcelo Götz, Franz J. Rammig, Flávio Rech Wagner
    RTC: A Real-Time Communication Middleware on Top of RTAI-Linux . [Citation Graph (0, 0)][DBLP]
    ISORC, 2003, pp:19-25 [Conf]
  21. Elias Teodoro Silva Jr., Edison Pignaton Freitas, Flávio Rech Wagner, Fabiano Costa Carvalho, Carlos Eduardo Pereira
    Java Framework for Distributed Real-Time Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ISORC, 2006, pp:85-92 [Conf]
  22. Marco A. Wehrmeister, Leandro Buss Becker, Flávio Rech Wagner, Carlos Eduardo Pereira
    An Object-Oriented Platform-based Design Process for Embedded Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    ISORC, 2005, pp:125-128 [Conf]
  23. Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski
    Power-aware NoC Reuse on the Testing of Core-based Systems. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:612-621 [Conf]
  24. Vanderlei Moraes Rodrigues, Flávio Rech Wagner
    A Logic to Specify and Verify Synchronous Transitions. [Citation Graph (0, 0)][DBLP]
    IWFM, 1999, pp:- [Conf]
  25. Leomar S. da Rosa Jr., Flávio Rech Wagner, Luigi Carro, Alexandre Carissimi, André Inácio Reis
    Scheduling Policy Costs on a JAVA Microcontroller. [Citation Graph (0, 0)][DBLP]
    OTM Workshops, 2003, pp:520-533 [Conf]
  26. Arnaldo Azevedo, Luciano Volcan Agostini, Flávio Rech Wagner, Sergio Bampi
    Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2005, pp:255-257 [Conf]
  27. Marcio F. da S. Oliveira, Lisane B. de Brisolara, Luigi Carro, Flávio Rech Wagner
    Early Embedded Software Design Space Exploration Using UML-Based Estimation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:24-32 [Conf]
  28. Júlio C. B. de Mattos, Antonio Carlos Schneider Beck, Luigi Carro, Flávio Rech Wagner
    Design Space Exploration with Automatic Selection of SW and HW for Embedded Applications. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:303-312 [Conf]
  29. Sandro Neves Soares, Flávio Rech Wagner
    Design Space Exploration using T&D-Bench. [Citation Graph (0, 0)][DBLP]
    SBAC-PAD, 2004, pp:40-47 [Conf]
  30. Márcio Oyamada, Felipe Zschornack, Flávio Rech Wagner
    Accurate software performance estimation using domain classification and neural networks. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2004, pp:175-180 [Conf]
  31. Francisco Assis M. do Nascimento, Marcio F. da S. Oliveira, Marco A. Wehrmeister, Carlos Eduardo Pereira, Flávio Rech Wagner
    MDA-based approach for embedded software generation from a UML/MOF repository. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2006, pp:143-148 [Conf]
  32. Elias Teodoro Silva Jr., Flávio Rech Wagner, Edison Pignaton Freitas, Carlos Eduardo Pereira
    Hardware support in a middleware for distributed and real-time embedded applications. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2006, pp:149-154 [Conf]
  33. Marcelo Moraes, Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski
    A constraint-based solution for on-line testing of processors embedded in real-time applications. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2005, pp:68-73 [Conf]
  34. Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Flávio Rech Wagner, Altamiro Amadeu Susin
    Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2005, pp:190-195 [Conf]
  35. Uilian Rafael Feijo Souza, Josue Klafke Sperb, Braulio Adriano de Mello, Flávio Rech Wagner
    Tangram - Virtual Integration of Heterogeneous IP Components in a Distributed Co-Simulation Environment. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:125-130 [Conf]
  36. Antonio C. S. Beck Filho, Júlio C. B. de Mattos, Flávio Rech Wagner, Luigi Carro
    CACO-PS: A General Purpose Cycle-Accurate Configurable Power Simulator. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:349-354 [Conf]
  37. Elias Teodoro Silva Jr., Marco A. Wehrmeister, Leandro Buss Becker, Flávio Rech Wagner, Carlos Eduardo Pereira
    Design Exploration in Hw/Sw Co-design of Real-Time Object-oriented Embedded Systems: the Scheduler Object. [Citation Graph (0, 0)][DBLP]
    WORDS, 2005, pp:378-388 [Conf]
  38. Vanderlei Moraes Rodrigues, Flávio Rech Wagner
    A logic for synchronous transitions with dynamic conflict resolution. [Citation Graph (0, 0)][DBLP]
    CLEI Electron. J., 2002, v:3, n:2, pp:- [Journal]
  39. Braulio Adriano de Mello, Uilian Rafael Feijo Souza, Josue Klafke Sperb, Flávio Rech Wagner
    Tangram: Virtual Integration of IP Components in a Distributed Cosimulation. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:5, pp:462-471 [Journal]
  40. Flávio Rech Wagner, Wander O. Cesário, Luigi Carro, Ahmed Amine Jerraya
    Strategies for the integration of hardware and software IP components in embedded systems-on-chip. [Citation Graph (0, 0)][DBLP]
    Integration, 2004, v:37, n:4, pp:223-252 [Journal]
  41. Miguel Rodrigues Fornari, Lia Goldstein Golendziner, Flávio Rech Wagner
    Schema Evolution in the STAR Framework. [Citation Graph (0, 0)][DBLP]
    RITA, 1998, v:5, n:1, pp:103-112 [Journal]
  42. Carla Maria Dal Sasso Freitas, Flávio Rech Wagner
    Ferramentas de suporte às tarefas da análise exploratória visual. [Citation Graph (0, 0)][DBLP]
    RITA, 1995, v:2, n:1, pp:5-36 [Journal]
  43. Lia Goldstein Golendziner, Clesio Saraiva dos Santos, Flávio Rech Wagner
    Modeling an engineering design application using extended object-oriented concepts. [Citation Graph (0, 0)][DBLP]
    RITA, 1998, v:5, n:1, pp:85-102 [Journal]
  44. Fabio Wronski, Eduardo Wenzel Brião, Flávio Rech Wagner
    Evaluating Energy-Aware Task Allocation Strategies for MPSOCS. [Citation Graph (0, 0)][DBLP]
    DIPES, 2006, pp:215-224 [Conf]
  45. Edison Pignaton Freitas, Marco A. Wehrmeister, Carlos Eduardo Pereira, Flávio Rech Wagner, Elias T. Silva, Fabiano Costa Carvalho
    Using Aspect-Oriented Concepts in the Requirements Analysis of Distributed Real-Time Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IESS, 2007, pp:221-230 [Conf]
  46. Flávio Rech Wagner, Luigi Carro
    Embedded SW Design Space Exploration and Automation using UML-Based Tools. [Citation Graph (0, 0)][DBLP]
    IESS, 2007, pp:437-440 [Conf]
  47. Flávio Rech Wagner, Wander O. Cesário, Ahmed Amine Jerraya
    Hardware/software IP integration using the ROSES design environment. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:3, pp:- [Journal]

  48. Experimental Analysis of a Wireless Sensor Network Setup Strategy Provided by an Agent-Oriented Middleware. [Citation Graph (, )][DBLP]


  49. Software Performance Estimation in MPSoC Design. [Citation Graph (, )][DBLP]


  50. Using UML as Front-end for Heterogeneous Software Code Generation Strategies. [Citation Graph (, )][DBLP]


  51. Dynamic Task Allocation Strategies in MPSoC for Soft Real-time Applications. [Citation Graph (, )][DBLP]


  52. Design management requirements for hardware description languages. [Citation Graph (, )][DBLP]


  53. A tightly coupled approach to design and data management. [Citation Graph (, )][DBLP]


  54. Urban Planning by Simulation of Population Growth. [Citation Graph (, )][DBLP]


  55. Model-based Methodologies for Pervasive and Embedded Software. [Citation Graph (, )][DBLP]


  56. On the Use of Software Quality Metrics to Improve Physical Properties of Embedded Systems. [Citation Graph (, )][DBLP]


  57. An Aspect-Oriented Approach for Dealing with Non-Functional Requirements in a Model-Driven Development of Distributed Embedded Real-Time Systems. [Citation Graph (, )][DBLP]


  58. An Infrastructure for Hardware-Software Co-Design of Embedded Real-Time Java Applications. [Citation Graph (, )][DBLP]


  59. Geo-aware Handover of Mission Agents Using Opportunistic Communication in VANET. [Citation Graph (, )][DBLP]


  60. A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCs. [Citation Graph (, )][DBLP]


  61. Analysis of the use of declarative languages for enhanced embedded system software development. [Citation Graph (, )][DBLP]


  62. Model driven engineering for MPSOC design space exploration. [Citation Graph (, )][DBLP]


  63. Fitting the router characteristics in NoCs to meet QoS requirements. [Citation Graph (, )][DBLP]


  64. Exploiting the model-driven engineering approach to improve design space exploration of embedded systems. [Citation Graph (, )][DBLP]


  65. Using MDE for the formal verification of embedded systems modeled by UML sequence diagrams. [Citation Graph (, )][DBLP]


  66. Impact of task migration in NoC-based MPSoCs for soft real-time applications. [Citation Graph (, )][DBLP]


  67. Motion Compensation Hardware Accelerator Architecture for H.264/AVC. [Citation Graph (, )][DBLP]


  68. Formal Verification for Embedded Systems Design Based on MDE. [Citation Graph (, )][DBLP]


  69. MDE approach to the co-synthesis of embedded systems using a MOF-based internal design representation. [Citation Graph (, )][DBLP]


  70. Software Quality Metrics and their Impact on Embedded Software. [Citation Graph (, )][DBLP]


  71. ModES: Embedded Systems Design Methodology and Tools Based on MDE. [Citation Graph (, )][DBLP]


  72. From classroom to research: providing different services for computer architecture education. [Citation Graph (, )][DBLP]


  73. An approach to improve predictability in communication services in distributed real-time embedded systems. [Citation Graph (, )][DBLP]


  74. A virtual platform for multiprocessor real-time embedded systems. [Citation Graph (, )][DBLP]


  75. Using a Link Metric to Improve Communication Mechanisms and Real-Time Properties in an Adaptive Middleware for Heterogeneous Sensor Networks. [Citation Graph (, )][DBLP]


  76. An agent framework to support sensor networks' setup and adaptation. [Citation Graph (, )][DBLP]


  77. Process algebra to model self-organizing behavior in Wireless Sensor Networks. [Citation Graph (, )][DBLP]


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