The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Rajarshi Mukherjee: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wanlin Cao, D. M. H. Walker, Rajarshi Mukherjee
    An efficient solution to the storage correspondence problem for large sequential circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:181-186 [Conf]
  2. Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita
    Automatic partitioning for efficient combinatorial verification. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:67-72 [Conf]
  3. Rajarshi Mukherjee, Seda Ogrenci Memik
    Evaluation of dual VDD fabrics for low power FPGAs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1240-1243 [Conf]
  4. Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
    Verification of an Industrial CC-NUMA Server. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:747-754 [Conf]
  5. Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Pradeep Bollineni
    Multiple Error Diagnosis Based on Xlists. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:660-665 [Conf]
  6. Jawahar Jain, Rajarshi Mukherjee, Masahiro Fujita
    Advanced Verification Techniques Based on Learning. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:420-426 [Conf]
  7. Rajarshi Mukherjee, Seda Ogrenci Memik
    Systematic temperature sensor allocation and placement for microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:542-547 [Conf]
  8. Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik
    Temperature-aware resource allocation and binding in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:196-201 [Conf]
  9. Kelvin Ng, Mukul R. Prasad, Rajarshi Mukherjee, Jawahar Jain
    Solving the latch mapping problem in an industrial setting. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:442-447 [Conf]
  10. Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell
    An Efficient Filter-Based Approach for Combinational Verification. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:132-137 [Conf]
  11. Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik
    A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. [Citation Graph (0, 0)][DBLP]
    ERSA, 2006, pp:56-62 [Conf]
  12. Rajarshi Mukherjee, Seda Ogrenci Memik
    Power Management for FPGAs: Power-Driven Design Partitioning. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:326-327 [Conf]
  13. Rajarshi Mukherjee, Seda Ogrenci Memik
    Power-Driven Design Partitioning. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:740-750 [Conf]
  14. Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik
    Thermal sensor allocation and placement for reconfigurable systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:437-442 [Conf]
  15. Rajarshi Mukherjee, Seda Ogrenci Memik
    Physical aware frequency selection for dynamic thermal management in multi-core systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:547-552 [Conf]
  16. Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik
    Peak temperature control and leakage reduction during binding in high level synthesis. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:251-256 [Conf]
  17. Rajarshi Mukherjee, Alex K. Jones, Prithviraj Banerjee
    Handling Data Streams while Compiling C Programs onto Hardware. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:271-272 [Conf]
  18. Vamsi Boppana, Indradeep Ghosh, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita
    Hierarchical Error Diagnosis Targeting RTL Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:436-441 [Conf]
  19. Indradeep Ghosh, Rajarshi Mukherjee, Mukul R. Prasad, Masahiro Fujita
    High Level Design Validation: Current Practices and Future Directions. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:9-11 [Conf]
  20. Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell
    On More Efficient Combinational ATPG Using Functional Learning. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:107-110 [Conf]
  21. Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
    Verification of an Industrial CC-NUMA Server. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:747-0 [Conf]
  22. Arjun Rajagopal, Belli Kuttanna, Balaji Janakiraman, Rajarshi Mukherjee, Joy Shetler
    A Reconfigurable Arithmetic Processor. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:172-175 [Conf]
  23. Ankur Jain, Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Michael S. Hsiao
    Testing, Verification, and Diagnosis in the Presence of Unknowns. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:263-270 [Conf]
  24. Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Jacob A. Abraham, Donald S. Fussell, Masahiro Fujita
    Efficient Combinational Verification Using Overlapping Local BDDs and a Hash Table. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2002, v:21, n:1, pp:95-101 [Journal]
  25. Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell
    An efficient filter-based approach for combinational verification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:11, pp:1542-1557 [Journal]
  26. Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci Memik
    Fine-grain thermal profiling and sensor insertion for FPGAs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  27. Rajarshi Mukherjee, Seda Ogrenci Memik
    An Integrated Approach to Thermal Management in High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:11, pp:1165-1174 [Journal]
  28. Eren Kursun, Rajarshi Mukherjee, Seda Ogrenci Memik
    Early Quality Assessment for Low Power Behavioral Synthesis. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2005, v:1, n:3, pp:273-285 [Journal]

Search in 0.006secs, Finished in 0.007secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002