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Hi-Keung Tony Ma:
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Publications of Author
- Eduard Cerny, Ashvin Dsouza, Kevin Harer, Pei-Hsin Ho, Hi-Keung Tony Ma
Supporting sequential assumptions in hybrid verification. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2005, pp:1035-1038 [Conf]
- Demos Anastasakis, Robert F. Damiano, Hi-Keung Tony Ma, Ted Stanion
A practical and efficient method for compare-point matching. [Citation Graph (0, 0)][DBLP] DAC, 2002, pp:305-310 [Conf]
- Douglas Braun, Jeffrey L. Burns, Srinivas Devadas, Hi-Keung Tony Ma, Kartikeya Mayaram, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli
Chameleon: a new multi-layer channel router. [Citation Graph (0, 0)][DBLP] DAC, 1986, pp:495-502 [Conf]
- Kwang-Ting Cheng, Hi-Keung Tony Ma
On the Over-Specification Problem in Sequential ATPG Algorithms. [Citation Graph (0, 0)][DBLP] DAC, 1992, pp:16-21 [Conf]
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
On the Verification of Sequential Machines at Differing Levels of Abstraction. [Citation Graph (0, 0)][DBLP] DAC, 1987, pp:271-276 [Conf]
- Hi-Keung Tony Ma, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli, R. Wei
Logic Verification Algorithms and Their Parallel Implementation. [Citation Graph (0, 0)][DBLP] DAC, 1987, pp:283-290 [Conf]
- Hi-Keung Tony Ma, Alberto L. Sangiovanni-Vincentelli
Mixed-level fault coverage estimation. [Citation Graph (0, 0)][DBLP] DAC, 1986, pp:553-559 [Conf]
- Dong Wang, Pei-Hsin Ho, Jiang Long, James H. Kukula, Yunshan Zhu, Hi-Keung Tony Ma, Robert F. Damiano
Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines. [Citation Graph (0, 0)][DBLP] DAC, 2001, pp:35-40 [Conf]
- Narendra V. Shenoy, Mahesh A. Iyer, Robert F. Damiano, Kevin Harer, Hi-Keung Tony Ma, Paul Thilking
A Robust Solution to the Timing Convergence Problem in High-Performance Design. [Citation Graph (0, 0)][DBLP] ICCD, 1999, pp:250-257 [Conf]
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
Redundancies and Don't Cares in Sequential Logic Synthesis. [Citation Graph (0, 0)][DBLP] ITC, 1989, pp:491-500 [Conf]
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. [Citation Graph (0, 0)][DBLP] ITC, 1988, pp:621-630 [Conf]
- Hi-Keung Tony Ma, A. Richard Newton, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli
An Incomplete Scan Design Approach to Test Generation for Sequential Machines. [Citation Graph (0, 0)][DBLP] ITC, 1988, pp:730-734 [Conf]
- Douglas Braun, Jeffrey L. Burns, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli, Kartikeya Mayaram, Srinivas Devadas, Hi-Keung Tony Ma
Techniques for multilayer channel routing. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:6, pp:698-712 [Journal]
- Kwang-Ting Cheng, Hi-Keung Tony Ma
On the over-specification problem in sequential ATPG algorithms. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:10, pp:1599-1604 [Journal]
- Srinivas Devadas, Hi-Keung Tony Ma
Easily testable PLA-based finite state machines. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:6, pp:604-611 [Journal]
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
On the verification of sequential machines at differing levels of abstraction. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:6, pp:713-722 [Journal]
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:12, pp:1290-1300 [Journal]
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
A synthesis and optimization procedure for fully and easily testable sequential machines. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1100-1107 [Journal]
- Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Irredundant sequential machines via optimal logic synthesis. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:1, pp:8-18 [Journal]
- Hi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Test generation for sequential circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1081-1093 [Journal]
- Hi-Keung Tony Ma, Srinivas Devadas, Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
Logic verification algorithms and their parallel implementation. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:2, pp:181-189 [Journal]
On Efficient and Robust Constraint Generation for Practical Layout Legalization. [Citation Graph (, )][DBLP]
Cell Swapping Based Migration Methodology for Analog and Custom Layouts. [Citation Graph (, )][DBLP]
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