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Alan J. Hu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Domagoj Babic, Alan J. Hu
    Integration of supercubing and learning in a SAT solver. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:438-444 [Conf]
  2. Xiushan Feng, Alan J. Hu, Jin Yang
    Partitioned model checking from software specifications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:583-587 [Conf]
  3. Jesse D. Bingham, Anne Condon, Alan J. Hu, Shaz Qadeer, Zhichuan Zhang
    Automatic Verification of Sequential Consistency for Unbounded Addresses and Data Values. [Citation Graph (0, 0)][DBLP]
    CAV, 2004, pp:427-439 [Conf]
  4. Jesse D. Bingham, Alan J. Hu
    Semi-formal Bounded Model Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 2002, pp:280-294 [Conf]
  5. Alan J. Hu, David L. Dill
    Efficient Verification with BDDs using Implicitly Conjoined Invariants. [Citation Graph (0, 0)][DBLP]
    CAV, 1993, pp:3-14 [Conf]
  6. David L. Dill, Alan J. Hu, Howard Wong-Toi
    Checking for Language Inclusion Using Simulation Preorders. [Citation Graph (0, 0)][DBLP]
    CAV, 1991, pp:255-265 [Conf]
  7. Alan J. Hu, David L. Dill, Andreas J. Drexler, C. Han Yang
    Higher-Level Specification and Verification with BDDs. [Citation Graph (0, 0)][DBLP]
    CAV, 1992, pp:82-95 [Conf]
  8. Flavio M. de Paula, Alan J. Hu
    EverLost: A Flexible Platform for Industrial-Strength Abstraction-Guided Simulation. [Citation Graph (0, 0)][DBLP]
    CAV, 2006, pp:282-285 [Conf]
  9. Alvin R. Albrecht, Alan J. Hu
    Register Transformations with Multiple Clock Domains. [Citation Graph (0, 0)][DBLP]
    CHARME, 2001, pp:126-139 [Conf]
  10. Alan J. Hu, Jeremy Casas, Jin Yang
    Reasoning about GSTE Assertion Graphs. [Citation Graph (0, 0)][DBLP]
    CHARME, 2003, pp:170-184 [Conf]
  11. Domagoj Babic, Jesse D. Bingham, Alan J. Hu
    Efficient SAT solving: beyond supercubes. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:744-749 [Conf]
  12. Alan J. Hu, David L. Dill
    Reducing BDD Size by Exploiting Functional Dependencies. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:266-271 [Conf]
  13. David W. Currie, Alan J. Hu, Sreeranga P. Rajan
    Automatic formal verification of DSP software. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:130-135 [Conf]
  14. Xiushan Feng, Alan J. Hu
    Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:1063-1068 [Conf]
  15. Shankar G. Govindaraju, David L. Dill, Alan J. Hu, Mark Horowitz
    Approximate Reachability with BDDs Using Overlapping Projections. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:451-456 [Conf]
  16. Alan J. Hu, Gary York, David L. Dill
    New Techniques for Efficient Verification with Implicitly Conjoined BDDs. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:276-282 [Conf]
  17. Marcio T. Oliveira, Alan J. Hu
    High-Level specification and automatic generation of IP interface monitors. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:129-134 [Conf]
  18. Xiushan Feng, Alan J. Hu
    Cutpoints for formal equivalence verification of embedded software. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:307-316 [Conf]
  19. Masahiro Fujita, Sreeranga P. Rajan, Alan J. Hu
    Two Real Formal Verification Experiences: ATM Switch Chip and Parallel Cache Protocol. [Citation Graph (0, 0)][DBLP]
    FM-Trends, 1998, pp:281-295 [Conf]
  20. Kim Milvang-Jensen, Alan J. Hu
    BDDNOW: A Parallel BDD Package. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1998, pp:501-507 [Conf]
  21. Kanna Shimizu, David L. Dill, Alan J. Hu
    Monitor-Based Formal Specification of PCI. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2000, pp:335-353 [Conf]
  22. Alan J. Hu, Rui Li, Xizheng Shi, Son T. Vuong
    Model-Checking a Secure Gorup Communication Protocol: A Case Study. [Citation Graph (0, 0)][DBLP]
    FORTE, 1999, pp:469-478 [Conf]
  23. Michael R. Marty, Jesse D. Bingham, Mark D. Hill, Alan J. Hu, Milo M. K. Martin, David A. Wood
    Improving Multiple-CMP Systems Using Token Coherence. [Citation Graph (0, 0)][DBLP]
    HPCA, 2005, pp:328-339 [Conf]
  24. Alan J. Hu, Jeremy Casas, Jin Yang
    Efficient Generation of Monitor Circuits for GSTE Assertion Graphs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:154-160 [Conf]
  25. Felix Sheng-Ho Chang, Alan J. Hu
    Fast Specification of Cycle-accurate Processor Models. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:488-492 [Conf]
  26. David L. Dill, Andreas J. Drexler, Alan J. Hu, C. Han Yang
    Protocol Verification as a Hardware Design Aid. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:522-525 [Conf]
  27. Alan J. Hu, Masahiro Fujita, Chris Wilson
    Formal Verification of the HAL S1 System Cache Coherence Protocol. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:438-444 [Conf]
  28. Kelvin Ng, Alan J. Hu, Jin Yang
    Generating Monitor Circuits for Simulation-Friendly GSTE Assertion Graphs. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:409-416 [Conf]
  29. Brian D. Winters, Alan J. Hu
    Source-Level Transformations for Improved Formal Verification. [Citation Graph (0, 0)][DBLP]
    ICCD, 2000, pp:599-0 [Conf]
  30. Xiushan Feng, Alan J. Hu
    Automatic formal verification for scheduled VLIW code. [Citation Graph (0, 0)][DBLP]
    LCTES-SCOPES, 2002, pp:85-92 [Conf]
  31. Jesse D. Bingham, Anne Condon, Alan J. Hu
    Toward a decidable notion of sequential consistency. [Citation Graph (0, 0)][DBLP]
    SPAA, 2003, pp:304-313 [Conf]
  32. Anne Condon, Alan J. Hu
    Automatable verification of sequential consistency. [Citation Graph (0, 0)][DBLP]
    SPAA, 2001, pp:113-121 [Conf]
  33. Jesse D. Bingham, Alan J. Hu
    Empirically Efficient Verification for a Class of Infinite-State Systems. [Citation Graph (0, 0)][DBLP]
    TACAS, 2005, pp:77-92 [Conf]
  34. Jesse Hoey, Robert St-Aubin, Alan J. Hu, Craig Boutilier
    SPUDD: Stochastic Planning using Decision Diagrams. [Citation Graph (0, 0)][DBLP]
    UAI, 1999, pp:279-288 [Conf]
  35. Drew Dean, Alan J. Hu
    Fixing Races for Fun and Profit: How to Use access(2). [Citation Graph (0, 0)][DBLP]
    USENIX Security Symposium, 2004, pp:195-206 [Conf]
  36. David W. Currie, Xiushan Feng, Masahiro Fujita, Alan J. Hu, Mark Kwan, Sreeranga P. Rajan
    Embedded Software Verification Using Symbolic Execution and Uninterpreted Functions. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2006, v:34, n:1, pp:61-91 [Journal]
  37. Anne Condon, Alan J. Hu
    Automatable Verification of Sequential Consistency. [Citation Graph (0, 0)][DBLP]
    Theory Comput. Syst., 2003, v:36, n:5, pp:431-460 [Journal]
  38. Domagoj Babic, Jesse D. Bingham, Alan J. Hu
    B-Cubing: New Possibilities for Efficient SAT-Solving. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1315-1324 [Journal]
  39. Zvonimir Rakamaric, Roberto Bruttomesso, Alan J. Hu, Alessandro Cimatti
    Verifying Heap-Manipulating Programs in an SMT Framework. [Citation Graph (0, 0)][DBLP]
    ATVA, 2007, pp:237-252 [Conf]
  40. Domagoj Babic, Alan J. Hu
    Structural Abstraction of Software Verification Conditions. [Citation Graph (0, 0)][DBLP]
    CAV, 2007, pp:366-378 [Conf]
  41. Flavio M. de Paula, Alan J. Hu
    An Effective Guidance Strategy for Abstraction-Guided Simulation. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:63-68 [Conf]
  42. Francine Bacchini, Alan J. Hu, Tom Fitzpatrick, Rajeev Ranjan, David Lacey, Mercedes Tan, Andrew Piziali, Avi Ziv
    Verification Coverage: When is Enough, Enough? [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:744-745 [Conf]

  43. Bridging pre-silicon verification and post-silicon validation. [Citation Graph (, )][DBLP]


  44. Boosting Verification by Automatic Tuning of Decision Procedures. [Citation Graph (, )][DBLP]


  45. BackSpace: Formal Analysis for Post-Silicon Debug. [Citation Graph (, )][DBLP]


  46. Exploiting Shared Structure in Software Verification Conditions. [Citation Graph (, )][DBLP]


  47. Simulation vs. Formal: Absorb What Is Useful; Reject What Is Useless. [Citation Graph (, )][DBLP]


  48. Calysto: scalable and precise extended static checking. [Citation Graph (, )][DBLP]


  49. Automatic Inference of Frame Axioms Using Static Analysis. [Citation Graph (, )][DBLP]


  50. Proving Termination by Divergence. [Citation Graph (, )][DBLP]


  51. An Inference-Rule-Based Decision Procedure for Verification of Heap-Manipulating Programs with Mutable Data and Cyclic Data Structures. [Citation Graph (, )][DBLP]


  52. A Scalable Memory Model for Low-Level Code. [Citation Graph (, )][DBLP]


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