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Rajarshee P. Bharadwaj: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rajarshee P. Bharadwaj, Rajan Konar, Poras T. Balsara, Dinesh Bhatia
    Exploiting temporal idleness to reduce leakage power in programmable architectures. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:651-656 [Conf]
  2. Rajarshee P. Bharadwaj
    Next Generation Architectures and CAD for Power Aware Programmable Fabrics. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:735-738 [Conf]
  3. Rajarshee P. Bharadwaj, Rajan Konar, Dinesh Bhatia, Poras T. Balsara
    FPGA Architecture for Standby Power Management. [Citation Graph (0, 0)][DBLP]
    FPT, 2005, pp:181-188 [Conf]
  4. Rajan Konar, Rajarshee P. Bharadwaj, Dinesh Bhatia, Poras T. Balsara
    Exploring Logic Block Granularity in Leakage Tolerant FPGA. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:754-757 [Conf]

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