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Publications of Author

1. Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Makoto Mori, Qinke Wang
   Optimal planning for mesh-based power distribution. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2004, pp:444-449 [Conf]
   
2. Charles J. Alpert, Andrew B. Kahng, Cliff C. N. Sze, Qinke Wang
   Timing-driven Steiner trees are (practically) free. [Citation Graph (0, 0)][DBLP]
   DAC, 2006, pp:389-392 [Conf]
   
3. Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sherief Reda, Qinke Wang
   Power-aware placement. [Citation Graph (0, 0)][DBLP]
   DAC, 2005, pp:795-800 [Conf]
   
4. Andrew B. Kahng, Chul-Hong Park, Puneet Sharma, Qinke Wang
   Lens aberration aware timing-driven placement. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:890-895 [Conf]
   
5. Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Bo Yao
   The Y-Architecture for On-Chip Interconnect: Analysis and Methodology. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2003, pp:13-20 [Conf]
   
6. Andrew B. Kahng, Sherief Reda, Qinke Wang
   Architecture and details of a high quality, large-scale analytical placer. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2005, pp:891-898 [Conf]
   
7. Andrew B. Kahng, Qinke Wang
   An analytic placer for mixed-size placement and timing-driven placement. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2004, pp:565-572 [Conf]
   
8. Andrew B. Kahng, Bao Liu, Qinke Wang
   Supply Voltage Degradation Aware Analytical Placement. [Citation Graph (0, 0)][DBLP]
   ICCD, 2005, pp:437-443 [Conf]
   
9. Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Xu Xu, Alexander Zelikovsky
   Multi-project reticle floorplanning and wafer dicing. [Citation Graph (0, 0)][DBLP]
   ISPD, 2004, pp:70-77 [Conf]
   
10. Andrew B. Kahng, Sherief Reda, Qinke Wang
    APlace: a general analytic placement framework. [Citation Graph (0, 0)][DBLP]
    ISPD, 2005, pp:233-235 [Conf]
    
11. Andrew B. Kahng, Qinke Wang
    Implementation and extensibility of an analytic placer. [Citation Graph (0, 0)][DBLP]
    ISPD, 2004, pp:18-25 [Conf]
    
12. Andrew B. Kahng, Qinke Wang
    A faster implementation of APlace. [Citation Graph (0, 0)][DBLP]
    ISPD, 2006, pp:218-220 [Conf]
    
13. Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang
    Estimation of wirelength reduction for lambda-geometry vs. manhattan placement and routing. [Citation Graph (0, 0)][DBLP]
    SLIP, 2003, pp:71-76 [Conf]
    
14. Qinke Wang, Lizhu Zhou
    Schema Based Data Storage and Query Optimization for Semi-structured Data. [Citation Graph (0, 0)][DBLP]
    Web-Age Information Management, 2000, pp:389-398 [Conf]
    
15. Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Bo Yao
    The Y architecture for on-chip interconnect: analysis and methodology. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:4, pp:588-599 [Journal]
    
16. Andrew B. Kahng, Qinke Wang
    Implementation and extensibility of an analytic placer. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:5, pp:734-747 [Journal]
    
17. Andrew B. Kahng, Bao Liu, Qinke Wang
    Stochastic Power/Ground Supply Voltage Prediction and Optimization Via Analytical Placement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:8, pp:904-912 [Journal]