The SCEAS System
Navigation Menu

Search the dblp DataBase


Ing-Jer Huang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ming-Chih Chen, Ing-Jer Huang, Chung-Ho Chen
    Parameterized MAC unit implementation. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:23-24 [Conf]
  2. Ing-Jer Huang, Dao-Zhen Chen
    A new approach to assembly software retargeting for microcontrollers. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:229-234 [Conf]
  3. Ing-Jer Huang, Hsin-Ming Chen, Chung-Fu Kao
    Reusable embedded in-circuit emulator. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:33-34 [Conf]
  4. Ing-Jer Huang, Alvin M. Despain
    High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:135-140 [Conf]
  5. Ing-Jer Huang, Alvin M. Despain
    Synthesis of Instruction Sets for Pipelined Microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:5-11 [Conf]
  6. Ing-Jer Huang, Tai-An Lu
    ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:580-585 [Conf]
  7. Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain
    Application-Driven Design Automation for Microprocessor Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:512-517 [Conf]
  8. Ing-Jer Huang, Alvin M. Despain
    Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:594-599 [Conf]
  9. Ing-Jer Huang, Alvin M. Despain
    Generating instruction sets and microarchitectures from applications. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:391-396 [Conf]
  10. Wen-Kai Huang, I-Ting Lin, Shi-Wei Chen, Ing-Jer Huang
    A cost-effective media processor for embedded applications [audio decoder example]. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:6122-6125 [Conf]
  11. Ing-Jer Huang, Ping-Huei Xie
    Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation. [Citation Graph (0, 0)][DBLP]
    ISSS, 1998, pp:131-136 [Conf]
  12. Ing-Jer Huang, Alvin M. Despain
    An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1993, pp:236-246 [Conf]
  13. Ing-Jer Huang, Chung-Fu Kao, Hsin-Ming Chen, Ching-Nan Juan, Tai-An Lu
    A Retargetable Embedded In-Circuit Emulation Module for Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:4, pp:28-38 [Journal]
  14. Ing-Jer Huang
    A Case Study: Synthesis and Exploration of Instruction Set Design for Application-Specific Symbolic Computing. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1998, v:14, n:4, pp:821-842 [Journal]
  15. Ing-Jer Huang, Dao-Zhen Chen
    Automatic Assembly Program Retargeting for Micrco controllers. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 2003, v:19, n:5, pp:717-743 [Journal]
  16. Ing-Jer Huang, Dao-Zhen Chen
    Mining Correlations of Human Gene Expression from Digital Gene Expression Profiles. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 2003, v:19, n:6, pp:909-921 [Journal]
  17. Ing-Jer Huang, Li-Rong Wang
    Automatic Simulation and Verification of Pipelined Microcontrollers. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1999, v:15, n:2, pp:307-320 [Journal]
  18. Ing-Jer Huang, Alvin M. Despain
    Synthesis of application specific instruction sets. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:6, pp:663-675 [Journal]
  19. Ing-Jer Huang
    Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:93-121 [Journal]
  20. Chung-Fu Kao, Ing-Jer Huang, Chi-Hung Lin
    An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:477-482 [Conf]
  21. Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang
    Automatic Verification of External Interrupt Behaviors for Microprocessor Design. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:896-901 [Conf]
  22. Ing-Jer Huang, Ping-Huei Xie
    Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:1, pp:44-54 [Journal]

  23. A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization. [Citation Graph (, )][DBLP]

  24. An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. [Citation Graph (, )][DBLP]

  25. An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools. [Citation Graph (, )][DBLP]

  26. Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP processor. [Citation Graph (, )][DBLP]

  27. Configurable AMBA On-Chip Real-Time Signal Tracer. [Citation Graph (, )][DBLP]

  28. A multi-resolution AHB bus tracer for real-time compression of forward/backward traces in a circular buffer. [Citation Graph (, )][DBLP]

  29. A trace-capable instruction cache for cost efficient real-time program trace compression in SoC. [Citation Graph (, )][DBLP]

  30. SystemC-Based Design Space Exploration of a 3D Graphics Acceleration SoC for Consumer Electronics. [Citation Graph (, )][DBLP]

  31. Verifying external interrupts of embedded microprocessor in SoC with on-chip bus. [Citation Graph (, )][DBLP]

  32. AMBA AHB bus potocol checker with efficient debugging mechanism. [Citation Graph (, )][DBLP]

  33. Design of a Dynamic PCM Selector for Non-deterministic Environment. [Citation Graph (, )][DBLP]

  34. Hardware-Software Approaches to In-Circuit Emulation for Embedded Processors. [Citation Graph (, )][DBLP]

Search in 0.005secs, Finished in 0.006secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002