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Subhasis Bhattacharjee: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Subhasis Bhattacharjee, Dhiraj K. Pradhan
    LPRAM: a low power DRAM with testability. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:390-393 [Conf]
  2. Sasanka Roy, Subhasis Bhattacharjee, Sandip Das, Subhas C. Nandy
    A Fast Algorithm for Point Labeling Problem. [Citation Graph (0, 0)][DBLP]
    CCCG, 2005, pp:155-158 [Conf]
  3. Pritha Banerjee, Subhasis Bhattacharjee, Susmita Sur-Kolay, Sandip Das, Subhas C. Nandy
    Fast FPGA Placement using Space-filling Curve. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:415-420 [Conf]
  4. Subhasis Bhattacharjee, Nabanita Das
    Distributed Time Slot Assignment in Wireless Ad Hoc Networks for STDMA. [Citation Graph (0, 0)][DBLP]
    ICDCIT, 2005, pp:93-104 [Conf]
  5. Subhasis Bhattacharjee, Nabanita Das
    Distributed Node-Based Transmission Power Control for Wireless Ad Hoc Networks. [Citation Graph (0, 0)][DBLP]
    ICDCIT, 2006, pp:49-62 [Conf]
  6. Debasis Mitra, Subhasis Bhattacharjee, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sujit T. Zachariah, Sandip Kundu
    Test Pattern Generation for Power Supply Droop Faults. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:343-348 [Conf]
  7. Subhasis Bhattacharjee, Nabanita Das
    Distributed Data Gathering Scheduling in Multihop Wireless Sensor Networks for Improved Lifetime. [Citation Graph (0, 0)][DBLP]
    ICCTA, 2007, pp:46-50 [Conf]
  8. Subhasis Bhattacharjee, Dhiraj K. Pradhan
    LPRAM: a novel low-power high-performance RAM design with testability and scalability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:5, pp:637-651 [Journal]

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