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Bhargab B. Bhattacharya: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty
    Synthesis of single-output space compactors with application to scan-based IP cores. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:496-502 [Conf]
  2. Debesh K. Das, Susanta Chakraborty, Bhargab B. Bhattacharya
    Interchangeable Boolean Functions and Their Effects on Redundancy in Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:469-474 [Conf]
  3. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    A New Synthesis of Symmetric Functions. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:160-165 [Conf]
  4. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faults. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:224-229 [Conf]
  5. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    An Adaptive BIST to Detect Multiple Stuck-Open Faults in CMOS circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:287-0 [Conf]
  6. Debesh K. Das, Bhargab B. Bhattacharya
    Testable design of non-scan sequential circuits using extra logic. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1995, pp:176-0 [Conf]
  7. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    Mapping Symmetric Functions to Hierarchical Modules for Path-Delay Fault Testability. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:284-289 [Conf]
  8. Debdeep Mukhopadhyay, Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya
    CryptoScan: A Secured Scan Chain Architecture. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2005, pp:348-353 [Conf]
  9. Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya
    Efficient Test Compaction for Pseudo-Random Testing. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2005, pp:337-342 [Conf]
  10. Subhashis Majumder, Bhargab B. Bhattacharya
    Density or Discrepancy: A VLSI Designer's Dilemma in Hot Spot Analysis. [Citation Graph (0, 0)][DBLP]
    CCCG, 2005, pp:167-170 [Conf]
  11. Subhas C. Nandy, Krishnendu Mukhopadhyaya, Bhargab B. Bhattacharya
    Shooter Location Problem. [Citation Graph (0, 0)][DBLP]
    CCCG, 1996, pp:93-98 [Conf]
  12. Arijit Bishnu, Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya
    An Improved Algorithm for Point Set Pattern Matching under Rigid Motion. [Citation Graph (0, 0)][DBLP]
    CIAC, 2003, pp:36-45 [Conf]
  13. Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya
    MUSC: Multigrid Shape Codes and Their Applications to Image Retrieval. [Citation Graph (0, 0)][DBLP]
    CIS (1), 2005, pp:1057-1063 [Conf]
  14. Susmita Sur-Kolay, Bhargab B. Bhattacharya
    Canonical Embedding of Rectangular Duals with Applications to VLSI Floorplanning. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:69-74 [Conf]
  15. Bhargab B. Bhattacharya, Suranjan Ghose, Bhabani P. Sinha, Pradip K. Srimani
    Heuristic Search Approach to Optimal Routing in a Distributed Architecture. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1984, pp:152-164 [Conf]
  16. Subhas C. Nandy, Bhargab B. Bhattacharya, Sibabrata Ray
    Efficient algorithms for Identifying All Maximal Isothetic Empty Rectangles in VLSI Layout Design. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1990, pp:255-269 [Conf]
  17. Subhas C. Nandy, Arani Sinha, Bhargab B. Bhattacharya
    Location of the Largest Empty Rectangle among Arbitrary Obstacles. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1994, pp:159-170 [Conf]
  18. Susmita Sur-Kolay, Bhargab B. Bhattacharya
    Inherent Nonslicibility of Rectangular Duals in VLSI Floorplanning. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1988, pp:88-107 [Conf]
  19. Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhattacharya
    Biobjective evolutionary and heuristic algorithms for intersection of geometric graphs. [Citation Graph (0, 0)][DBLP]
    GECCO, 2006, pp:1689-1696 [Conf]
  20. Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya
    On finding the minimum test set of a BDD-based circuit. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:169-172 [Conf]
  21. Partha Bhowmick, Bhargab B. Bhattacharya
    Approximation of Digital Circles by Regular Polygons. [Citation Graph (0, 0)][DBLP]
    ICAPR (1), 2005, pp:257-267 [Conf]
  22. Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya
    A unified approach to topology generation and area optimization of general floorplans. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:712-715 [Conf]
  23. Susmita Sur-Kolay, Bhargab B. Bhattacharya
    The Cycle Structure of Channel Graphs in Nonslicible Floorplans and A Unified Algorithm for Feasible Routing Order. [Citation Graph (0, 0)][DBLP]
    ICCD, 1991, pp:524-527 [Conf]
  24. Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya
    On-chip computation of Euler number of a binary image for efficient database search. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 2001, pp:310-313 [Conf]
  25. Arijit Bishnu, Swarup Bhunia, C. A. Murthy, Bhargab B. Bhattacharya, Malay Kumar Kundu, Tinku Acharya
    Content based image retrieval: related issues using Euler vector. [Citation Graph (0, 0)][DBLP]
    ICIP (2), 2002, pp:585-588 [Conf]
  26. Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya
    Reconstruction of torn documents using contour maps. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 2005, pp:517-520 [Conf]
  27. Partha Bhowmick, Bhargab B. Bhattacharya
    Approximate Fingerprint Matching Using Kd-Tree. [Citation Graph (0, 0)][DBLP]
    ICPR (1), 2004, pp:544-547 [Conf]
  28. Partha Bhowmick, Bhargab B. Bhattacharya
    CODE: An Adaptive Algorithm for Detecting Corners and Directions of Incident Edges. [Citation Graph (0, 0)][DBLP]
    ICVGIP, 2004, pp:509-515 [Conf]
  29. Partha Bhowmick, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya
    Determination of Minutiae Scores for Fingerprint Image Applications. [Citation Graph (0, 0)][DBLP]
    ICVGIP, 2002, pp:- [Conf]
  30. Arijit Bishnu, Partha Bhowmick, Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya
    Combinatorial Classification of Pixels for Ridge Extraction in a Gray-Scale Fingerprint Image. [Citation Graph (0, 0)][DBLP]
    ICVGIP, 2002, pp:- [Conf]
  31. Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya
    CONFERM: Connectivity Features with Randomized Masks and Their Applications to Image Indexing. [Citation Graph (0, 0)][DBLP]
    ICVGIP, 2004, pp:556-562 [Conf]
  32. Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya
    PACE: Polygonal Approximation of Thick Digital Curves Using Cellular Envelope. [Citation Graph (0, 0)][DBLP]
    ICVGIP, 2006, pp:299-310 [Conf]
  33. Subhashis Majumder, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Subhas C. Nandy
    Area(number)-balanced hierarchy of staircase channels with minimum crossing nets. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:395-398 [Conf]
  34. Subir Bandyopadhyay, Bhargab B. Bhattacharya
    On the Testable Design of Bilateral Bit-Level Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:1024-1033 [Conf]
  35. Bhargab B. Bhattacharya, Bidyut Gupta
    Syndrome Testable Design of Combinational Networks for Detecting Stuck-At and Bridging Faults. [Citation Graph (0, 0)][DBLP]
    ITC, 1983, pp:446-452 [Conf]
  36. Bhargab B. Bhattacharya, Bidyut Gupta
    Logical Modeling of Physical Failures and Their Inherent Syndrome Testability in MOS LSI/VLSI Networks. [Citation Graph (0, 0)][DBLP]
    ITC, 1984, pp:847-855 [Conf]
  37. Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang
    Double-Tree Scan: A Novel Low-Power Scan-Path Architecture. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:470-479 [Conf]
  38. Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya
    Euler Vector: A Combinatorial Signature for Gray-Tone Images. [Citation Graph (0, 0)][DBLP]
    ITCC, 2002, pp:121-127 [Conf]
  39. Suman K. Mitra, C. A. Murthy, Malay Kumar Kundu, Bhargab B. Bhattacharya, Tinku Acharya
    Fractal Image Compression Using Iterated Function System with Probabilities. [Citation Graph (0, 0)][DBLP]
    ITCC, 2001, pp:191-195 [Conf]
  40. Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya
    Isothetic Polygonal Approximations of a 2D Object on Generalized Grid. [Citation Graph (0, 0)][DBLP]
    PReMI, 2005, pp:407-412 [Conf]
  41. Piyush K. Bhunre, C. A. Murthy, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu
    A Hybrid Data and Space Partitioning Technique for Similarity Queries on Bounded Clusters. [Citation Graph (0, 0)][DBLP]
    PReMI, 2005, pp:544-550 [Conf]
  42. Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya
    TIPS: On Finding a Tight Isothetic Polygonal Shape Covering a 2D Object. [Citation Graph (0, 0)][DBLP]
    SCIA, 2005, pp:930-939 [Conf]
  43. Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya
    An Efficient Scan Tree Design for Compact Test Pattern Set. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:175-180 [Conf]
  44. Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel
    Zero-Aliasing Space Compression using a Single Periodic Output and its Application to Testing of Embedded Cores. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:382-391 [Conf]
  45. Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang
    Low-Energy BIST Design for Scan-based Logic Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:546-551 [Conf]
  46. Susanta Chakraborty, Sandip Das, Debesh K. Das, Bhargab B. Bhattacharya
    Synthesis of Symmetric Functions for Path-Delay Fault Testability. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:512-517 [Conf]
  47. Swarup Bhunia, Subhashis Majumder, Ayan Sircar, Susmita Sur-Kolay, Bhargab B. Bhattacharya
    Topological Routing Amidst Polygonal Obstacles. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:274-279 [Conf]
  48. P. S. Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya
    VLSI floorplan generation and area optimization using AND-OR graph search. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:370-375 [Conf]
  49. Parthasarathi Dasgupta, A. K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya
    Geometric bipartitioning problem and its applications to VLSI. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:400-405 [Conf]
  50. Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu, Tinku Acharya
    A Fast Algorithm for Computing the Euler Number of an Image and its VLSI Implementation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:330-335 [Conf]
  51. Sandip Das, Bhargab B. Bhattacharya
    Via Minimization in Channel Routing by Layout Modification. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:109-110 [Conf]
  52. Sandip Das, Bhargab B. Bhattacharya
    Channel routing in Manhattan-diagonal model. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:43-48 [Conf]
  53. Debesh Kumar Das, Bhargab B. Bhattacharya
    Does retiming affect redundancy in sequential circuits? [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:260-263 [Conf]
  54. Debesh Kumar Das, Bhargab B. Bhattacharya, Satoshi Ohtake, Hideo Fujiwara
    Testable Design of Sequential Circuits with Improved Fault Efficiency. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:128-133 [Conf]
  55. Debesh Kumar Das, Susanta Chakraborty, Bhargab B. Bhattacharya
    New BIST Techniques for Universal and Robust Testing of CMOS Stuck-Open Faults. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:303-309 [Conf]
  56. Debesh K. Das, Indrajit Chaudhuri, Bhargab B. Bhattacharya
    Design of an Optimal Test Pattern Generator for Built-in Self Testing of Path Delay Faults. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:205-0 [Conf]
  57. Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya
    High Performance MCM Routing: A New Approach. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:564-569 [Conf]
  58. Sandip Das, Susmita Sur-Kolay, Bhargab B. Bhattacharya
    Routing of L-Shaped Channels, Switchboxes and Staircases in Manhattan-Diagonal Model. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:65-0 [Conf]
  59. Subhashis Majumder, Bhargab B. Bhattacharya
    Solving Thermal Problems of Hot Chips Using Voronoi Diagrams. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:545-548 [Conf]
  60. Subhashis Majumder, Bhargab B. Bhattacharya, Vishwani D. Agrawal, Michael L. Bushnell
    A Complete Characterization of Path Delay Faults through Stuck-at Faults. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:492-497 [Conf]
  61. Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya
    Partitioning VLSI Floorplans by Staircase Channels for Global Routing. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:59-64 [Conf]
  62. Subhashis Majumder, Susmita Sur-Kolay, Subhas C. Nandy, Bhargab B. Bhattacharya, B. Chakraborty
    Hot Spots and Zones in a Chip: A Geometrician's View. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:691-696 [Conf]
  63. Anirban Lahiri, Saurabh Agarwal, Anupam Basu, Bhargab B. Bhattacharya
    Recovery-Based Real-Time Static Scheduling for Battery Life Optimization. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:469-472 [Conf]
  64. Debasis Mitra, Subhasis Bhattacharjee, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sujit T. Zachariah, Sandip Kundu
    Test Pattern Generation for Power Supply Droop Faults. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:343-348 [Conf]
  65. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    A New Synthesis of Symmetric Functions. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:160-165 [Conf]
  66. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    Easily Testable Realization of GRM and ESOP Networks for Detecting Stuck-at and Bridging Faults. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:487-492 [Conf]
  67. Koushik Sinha, Susmita Sur-Kolay, Bhargab B. Bhattacharya, P. S. Dasgupta
    Partitioning Routing Area into Zones with Distinct Pins. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:345-0 [Conf]
  68. Susmita Sur-Kolay, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, Sujit T. Zachariah
    Physical Design Trends and Layout-Based Fault Modeling. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:6-8 [Conf]
  69. Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya
    On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:491-496 [Conf]
  70. Debesh K. Das, Uttam K. Bhattacharya, Bhargab B. Bhattacharya
    Isomorph-redundancy in sequential circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:463-469 [Conf]
  71. A. Morozov, Michael Gössel, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
    Design of Parameterizable Error-Propagating Space Compactors for Response Observation. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:48-53 [Conf]
  72. Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya
    Characterization of Isothetic Polygons for Image Indexing and Retrieval. [Citation Graph (0, 0)][DBLP]
    ICCTA, 2007, pp:590-594 [Conf]
  73. Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhattacharya
    A Local Search Heuristic for Biobjective Intersecting Geometric Graphs. [Citation Graph (0, 0)][DBLP]
    ICCTA, 2007, pp:224-230 [Conf]
  74. Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya
    ICE: The Isothetic Convex Envelope of a Digital Object. [Citation Graph (0, 0)][DBLP]
    ICCTA, 2007, pp:219-223 [Conf]
  75. Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya
    Ranking of Optical Character Prototypes in a Large Database Using Isothetic Chord Lengths. [Citation Graph (0, 0)][DBLP]
    ICCTA, 2007, pp:422-426 [Conf]
  76. Subhas C. Nandy, Bhargab B. Bhattacharya
    On finding an empty staircase polygon of largest area (width) in a planar point-set. [Citation Graph (0, 0)][DBLP]
    Comput. Geom., 2003, v:26, n:2, pp:143-171 [Journal]
  77. Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu
    A Simple Architecture for Computing Moments and Orientation of an Image. [Citation Graph (0, 0)][DBLP]
    Fundam. Inform., 2002, v:52, n:4, pp:285-295 [Journal]
  78. Sabyasachi Dey, Bhargab B. Bhattacharya, Malay K. Kundu, Arijit Bishnu, Tinku Acharya
    A Co-processor for Computing the Euler Number of a Binary Image using Divide-and-Conquer Strategy. [Citation Graph (0, 0)][DBLP]
    Fundam. Inform., 2007, v:76, n:1-2, pp:75-89 [Journal]
  79. Partha Bhowmick, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya
    Determination of Minutiae Scores for Fingerprint Image Applications. [Citation Graph (0, 0)][DBLP]
    Int. J. Image Graphics, 2005, v:5, n:3, pp:537-572 [Journal]
  80. Subhas C. Nandy, Bhargab B. Bhattacharya, Antonio Hernández-Barrera
    Safety Zone Problem. [Citation Graph (0, 0)][DBLP]
    J. Algorithms, 2000, v:37, n:2, pp:538-569 [Journal]
  81. Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya
    On Finding A Staircase Channel With Minimum Crossing Nets In A VLSI Floorplan. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2004, v:13, n:5, pp:1019-1038 [Journal]
  82. Subhashis Majumder, Bhargab B. Bhattacharya, Vishwani D. Agrawal, Michael L. Bushnell
    A New Classification of Path-Delay Fault Testability in Terms of Stuck-at Faults. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2004, v:19, n:6, pp:955-964 [Journal]
  83. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    BIST Design for Detecting Multiple Stuck-Open Faults in CMOS Circuits Using Transition Count. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2002, v:17, n:6, pp:731-737 [Journal]
  84. Arijit Bishnu, Bhargab B. Bhattacharya, Malay K. Kundu, C. A. Murthy, Tinku Acharya
    A pipeline architecture for computing the Euler number of a binary image. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2005, v:51, n:8, pp:470-487 [Journal]
  85. Nabanita Das, Bhargab B. Bhattacharya, Sergei L. Bezrukov
    Permutation routing in optical MIN with minimum number of stages. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2003, v:48, n:11-12, pp:311-323 [Journal]
  86. Arijit Bishnu, Bhargab B. Bhattacharya
    Stacked Euler Vector (SERVE): A Gray-Tone Image Feature Based on Bit-Plane Augmentation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Pattern Anal. Mach. Intell., 2007, v:29, n:2, pp:350-355 [Journal]
  87. Arijit Bishnu, Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya
    Simple algorithms for partial point set pattern matching under rigid motion. [Citation Graph (0, 0)][DBLP]
    Pattern Recognition, 2006, v:39, n:9, pp:1662-1671 [Journal]
  88. Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel
    Zero-Aliasing Space Compaction of Test Responses Using a Single Periodic Output. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:12, pp:1646-1651 [Journal]
  89. Bhargab B. Bhattacharya, Bidyut Gupta
    On the Impossible Class of Faulty Functions in Logic Networks Under Short Circuit Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:1, pp:85-90 [Journal]
  90. Bhargab B. Bhattacharya, Sharad C. Seth
    Design of Parity Testable Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:11, pp:1580-1584 [Journal]
  91. Debesh K. Das, Uttam K. Bhattacharya, Bhargab B. Bhattacharya
    Isomorph-Redundancy in Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:9, pp:992-997 [Journal]
  92. Nabanita Das, Bhargab B. Bhattacharya, Jayasree Dattagupta
    Isomorphism of Conflict Graphs in Multistage Interconnection Networks and Its Application to Optimal Routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:665-677 [Journal]
  93. Nabanita Das, Bhargab B. Bhattacharya, Jayasree Dattagupta
    Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:12, pp:1439-1444 [Journal]
  94. Bhabani P. Sinha, Bhargab B. Bhattacharya
    On the Numerical Complexity of Short-Circuit Faults in Logic Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:2, pp:186-190 [Journal]
  95. Bhabani P. Sinha, Bhargab B. Bhattacharya, Suranjan Ghose, Pradip K. Srimani
    A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:11, pp:1000-1004 [Journal]
  96. Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty
    Synthesis of single-output space compactors for scan-based sequential circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:10, pp:1171-1179 [Journal]
  97. Susanta Chakrabarti, Sandip Das, Debesh Kumar Das, Bhargab B. Bhattacharya
    Synthesis of symmetric functions for path-delay fault testability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:9, pp:1076-1081 [Journal]
  98. Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya
    A unified approach to topology generation and optimal sizing of floorplans. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:2, pp:126-135 [Journal]
  99. Jitender S. Deogun, Bhargab B. Bhattacharya
    Via minimization in VLSI routing with movable terminals. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:8, pp:917-920 [Journal]
  100. Sandip Das, Susmita Sur-Kolay, Bhargab B. Bhattacharya
    Manhattan-diagonal routing in channels and switchboxes. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:1, pp:75-104 [Journal]
  101. Parthasarathi Dasgupta, Peichen Pan, Subhas C. Nandy, Bhargab B. Bhattacharya
    Monotone bipartitioning problem in a planar point set with applications to VLSI. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:2, pp:231-248 [Journal]
  102. Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya
    Euler vector for search and retrieval of gray-tone images. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Systems, Man, and Cybernetics, Part B, 2005, v:35, n:4, pp:801-812 [Journal]
  103. Parthasarathi Dasgupta, A. K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya
    Searching networks with unrestricted edge costs. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Systems, Man, and Cybernetics, Part A, 2001, v:31, n:6, pp:497-507 [Journal]
  104. Partha Bhowmick, Bhargab B. Bhattacharya
    Fast Polygonal Approximation of Digital Curves Using Relaxed Straightness Properties. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Pattern Anal. Mach. Intell., 2007, v:29, n:9, pp:1590-1602 [Journal]
  105. Subhashis Majumder, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Swarup Kumar Das
    Hierarchical partitioning of VLSI floorplans by staircases. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:1, pp:- [Journal]
  106. Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
    Implementing Symmetric Functions with Hierarchical Modules for Stuck-At and Path-Delay Fault Testability. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2006, v:22, n:2, pp:125-142 [Journal]

  107. Recognition of Largest Empty Orthoconvex Polygon in a Point Set. [Citation Graph (, )][DBLP]


  108. Detection of Circular Arcs in a Digital Image Using Chord and Sagitta Properties. [Citation Graph (, )][DBLP]


  109. GOAL: Towards Understanding of Graphic Objects from Architectural to Line Drawings. [Citation Graph (, )][DBLP]


  110. Finding the Orthogonal Hull of a Digital Object: A Combinatorial Approach. [Citation Graph (, )][DBLP]


  111. Digital Circularity and Its Applications. [Citation Graph (, )][DBLP]


  112. On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set. [Citation Graph (, )][DBLP]


  113. A Unified Solution to Scan Test Volume, Time, and Power Minimization. [Citation Graph (, )][DBLP]


  114. A Simple Algorithm for Approximate Partial Point Set Pattern Matching under Rigid Motion. [Citation Graph (, )][DBLP]


  115. Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. [Citation Graph (, )][DBLP]


  116. Extraction of regions of interest from face images using cellular analysis. [Citation Graph (, )][DBLP]


  117. Archival image indexing with connectivity features using randomized masks. [Citation Graph (, )][DBLP]


  118. Number-theoretic interpretation and construction of a digital circle. [Citation Graph (, )][DBLP]


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