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Nuttorn Jangkrajarng: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi
    Hierarchical extraction and verification of symmetry constraints for analog layout automation. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:400-405 [Conf]
  2. Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi
    Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:394-399 [Conf]
  3. Lili Zhou, Cherry Wakayama, Nuttorn Jangkrajarng, Bo Hu, C.-J. Richard Shi
    A high-throughput low-power fully parallel 1024-bit 1/2-rate low density parity check code decoder in 3-dimensional integrated circuits. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:92-93 [Conf]
  4. Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi
    Correct-by-construction layout-centric retargeting of large analog designs. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:139-144 [Conf]
  5. Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J. Richard Shi
    Template-driven parasitic-aware optimization of analog integrated circuit layouts. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:644-647 [Conf]
  6. Nuttorn Jangkrajarng, Lihong Zhang, Sambuddha Bhattacharya, Nathan Kohagen, C.-J. Richard Shi
    Template-based parasitic-aware optimization and retargeting of analog and RF integrated circuit layouts. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:342-348 [Conf]
  7. Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi
    Automatic analog layout retargeting for new processes and device sizes. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2003, pp:704-707 [Conf]
  8. Roy Hartono, Nuttorn Jangkrajarng, Sambuddha Bhattacharya, C.-J. Richard Shi
    Automatic Device Layout Generation for Analog Layout Retargeting. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:457-462 [Conf]
  9. Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi
    IPRAIL - intellectual property reuse-based analog IC layout automation. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:237-262 [Journal]
  10. Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J. Richard Shi
    Multilevel symmetry-constraint generation for retargeting large analog layouts. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:6, pp:945-960 [Journal]

  11. Implementing a 2-Gbs 1024-bit 1/2-rate low-density parity-check code decoder in three-dimensional integrated circuits. [Citation Graph (, )][DBLP]


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