The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Weixing Ji: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Weixing Ji, Feng Shi, Baojun Qiao
    A self-maintained memory module supporting DMM. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:189-197 [Conf]
  2. Baojun Qiao, Feng Shi, Weixing Ji
    THIN: A New Hierarchical Interconnection Network-on-Chip for SOC. [Citation Graph (0, 0)][DBLP]
    ICA3PP, 2007, pp:446-457 [Conf]

  3. High Performance Memory Management for a Multi-core Architecture. [Citation Graph (, )][DBLP]


  4. The Design of a Novel Object-oriented Processor : OOMIPS. [Citation Graph (, )][DBLP]


  5. A Triplet-based Computer Architecture Supporting Parallel Object Computing. [Citation Graph (, )][DBLP]


  6. Storage Architecture for an On-chip Multi-core Processor. [Citation Graph (, )][DBLP]


  7. N-port memory mapping for LUT-based FPGAs. [Citation Graph (, )][DBLP]


  8. A Novel Adaptive Scratchpad Memory Management Strategy. [Citation Graph (, )][DBLP]


  9. Performance Evaluation of a Self-Maintained Memory Module. [Citation Graph (, )][DBLP]


  10. A state machine approach for problem detection in large-scale distributed system. [Citation Graph (, )][DBLP]


  11. A Parallel Memory System Model for Multi-core Processor. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002