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Iuliana Bacivarov:
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- Aimen Bouchhima, Iuliana Bacivarov, Wassim Youssef, Marius Bonaciu, Ahmed Amine Jerraya
Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2005, pp:969-972 [Conf]
- Florin Dumitrascu, Iuliana Bacivarov, Lorenzo Pieralisi, Marius Bonaciu, Ahmed Amine Jerraya
Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. [Citation Graph (0, 0)][DBLP] DATE Designers' Forum, 2006, pp:166-171 [Conf]
- Sungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed Amine Jerraya
Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. [Citation Graph (0, 0)][DBLP] DATE, 2003, pp:10550-10555 [Conf]
- Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, Kai Huang
Mapping Applications to Tiled Multiprocessor Embedded Systems. [Citation Graph (0, 0)][DBLP] ACSD, 2007, pp:29-40 [Conf]
Efficient execution of Kahn process networks on multi-processor systems using protothreads and windowed FIFOs. [Citation Graph (, )][DBLP]
Generation and calibration of compositional performance analysis models for multi-processor systems. [Citation Graph (, )][DBLP]
Scalably distributed SystemC simulation for embedded applications. [Citation Graph (, )][DBLP]
A modular fast simulation framework for stream-oriented MPSoC. [Citation Graph (, )][DBLP]
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