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Marcin Jeske: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Grzegorz Blakiewicz, Marcin Jeske, Malgorzata Chrzanowska-Jeske, Jin S. Zhang
    Substrate noise modeling in early floorplanning of MS-SOCs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:819-823 [Conf]
  2. Yu Xia, Malgorzata Chrzanowska-Jeske, Benyi Wang, Marcin Jeske
    Using a Distributed Rectangle Bin-Packing Approach for Core-based SoC Test Scheduling with Power Constraints. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:100-106 [Conf]
  3. Marcin Jeske, Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske, Benyi Wang
    Substrate noise-aware floorplanning for mixed-signal SOCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:445-448 [Conf]
  4. Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Marcin Jeske, Naveed A. Sherwani
    Integrated floorplanning with buffer/channel insertion for bus-based designs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:6, pp:730-741 [Journal]

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