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Minsik Cho:
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- Minsik Cho, Hongjoong Shin, David Z. Pan
Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2006, pp:765-770 [Conf]
- Minsik Cho, David Z. Pan
BoxRouter: a new global router based on box expansion and progressive ILP. [Citation Graph (0, 0)][DBLP] DAC, 2006, pp:373-378 [Conf]
- Minsik Cho, Suhail Ahmed, David Z. Pan
TACO: temperature aware clock-tree optimization. [Citation Graph (0, 0)][DBLP] ICCAD, 2005, pp:582-587 [Conf]
- Minsik Cho, David Z. Pan, Hua Xiang, Ruchir Puri
Wire density driven global routing for CMP variation and timing. [Citation Graph (0, 0)][DBLP] ICCAD, 2006, pp:487-492 [Conf]
- Minsik Cho, David Z. Pan
PEAKASO: Peak-Temperature Aware Scan-Vector Optimization. [Citation Graph (0, 0)][DBLP] VTS, 2006, pp:52-57 [Conf]
- Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan
TROY: Track Router with Yield-driven Wire Planning. [Citation Graph (0, 0)][DBLP] DAC, 2007, pp:55-58 [Conf]
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond. [Citation Graph (, )][DBLP]
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction. [Citation Graph (, )][DBLP]
History-based VLSI legalization using network flow. [Citation Graph (, )][DBLP]
BoxRouter 2.0: architecture and implementation of a hybrid and robust global router. [Citation Graph (, )][DBLP]
Double patterning technology friendly detailed routing. [Citation Graph (, )][DBLP]
A high-performance droplet router for digital microfluidic biochips. [Citation Graph (, )][DBLP]
Metal-density driven placement for cmp variation and routability. [Citation Graph (, )][DBLP]
Logical and physical restructuring of fan-in trees. [Citation Graph (, )][DBLP]
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