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Publications of Author

1. Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy
   Dynamic Noise Analysis with Capacitive and Inductive Coupling. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:65-70 [Conf]
   
2. Bipul Chandra Paul, Seung Hoon Choi, Yonghee Im, Kaushik Roy
   Design Verification and Robust Design Technique for Cross-Talk Faults. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2001, pp:449-0 [Conf]
   
3. Seung Hoon Choi, Kaushik Roy, Florentin Dartu
   Timed pattern generation for noise-on-delay calculation. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:870-873 [Conf]
   
4. Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy
   Novel sizing algorithm for yield improvement under process variation in nanometer technology. [Citation Graph (0, 0)][DBLP]
   DAC, 2004, pp:454-459 [Conf]
   
5. Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De
   Dynamic noise analysis in precharge-evaluate circuits. [Citation Graph (0, 0)][DBLP]
   DAC, 2000, pp:243- [Conf]
   
6. Seung Hoon Choi, Kaushik Roy
   A New Crosstalk Noise Model for DOMINO Logic Circuits. [Citation Graph (0, 0)][DBLP]
   DATE, 2003, pp:11112-11113 [Conf]
   
7. Seung Hoon Choi, Kaushik Roy
   Noise Analysis under Capacitive and Inductive Coupling for High Speed Circuits. [Citation Graph (0, 0)][DBLP]
   DELTA, 2002, pp:365-369 [Conf]
   
8. Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy
   Dynamic Noise Analysis with Capacitive and Inductive Coupling. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:65-70 [Conf]
   
9. Seung Hoon Choi
   Component Reconfiguration Tool for Software Product Lines with XML Technology. [Citation Graph (0, 0)][DBLP]
   WISE, 2004, pp:572-583 [Conf]