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Ivo Bolsens: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jason Cong, Tony Ma, Ivo Bolsens, Phil Moorby, Jan M. Rabaey, John Sanguinetti, Kazutoshi Wakabayashi, Yoshi Watanabe
    Are we ready for system-level synthesis? [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:- [Conf]
  2. Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
    Hardware/software partitioning of embedded system in OCAPI-xl. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:30-35 [Conf]
  3. E. Berrebi, Polen Kission, Serge Vernalde, S. De Troch, J. C. Herluison, J. Fréhel, Ahmed Amine Jerraya, Ivo Bolsens
    Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:573-578 [Conf]
  4. Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man
    Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:513-518 [Conf]
  5. Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar
    What happened to ASIC?: Go (recon)figure? [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:185- [Conf]
  6. Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi
    Fast, cheap and under control: the next implementation fabric. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:354-355 [Conf]
  7. Marc van Heijningen, Mustafa Badaroglu, Stéphane Donnay, Marc Engels, Ivo Bolsens
    High-level simulation of substrate noise generation including power supply noise coupling. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:446-451 [Conf]
  8. Lode Nachtergaele, Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Ivo Bolsens
    Implementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:333-336 [Conf]
  9. Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens
    Hardware Reuse at the Behavioral Level. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:784-789 [Conf]
  10. Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
    A Programming Environment for the Design of Complex High Speed ASICs. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:315-320 [Conf]
  11. Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
    A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:440-445 [Conf]
  12. Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stéphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens
    High-level simulation of substrate noise generation from large digital circuits with multiple supplies. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:326-330 [Conf]
  13. Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick
    Single Chip or Hybrid System Integration. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:616-0 [Conf]
  14. Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens
    A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:271-0 [Conf]
  15. Steve Guccione, Diederik Verkest, Ivo Bolsens
    Design Technology for Networked Reconfigurable FPGA Platforms. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:994-999 [Conf]
  16. J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chris Wheddon, Bhusan Gupta, Yankin Tanurhan
    Reconfigurable SoC - What Will it Look Like? [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:660-663 [Conf]
  17. Wolfgang Rosenstiel, Rudy Lauwereins, Ivo Bolsens, Chris Rowen, Yankin Tanurhan, Kees A. Vissers, S. Wang
    Panel Title: Reconfigurable Computing - Different Perspectives. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10476-10477 [Conf]
  18. Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stéphane Donnay, Marc Engels, Ivo Bolsens
    Efficient bit-error-rate estimation of multicarrier transceivers. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:164-168 [Conf]
  19. Piet Wambacq, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
    Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:350-0 [Conf]
  20. Piet Wambacq, Stéphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens
    A Single-Package Solution for Wireless Transceivers. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:425-0 [Conf]
  21. Ivo Bolsens
    Challenges and Opportunities for FPGA Platforms. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:391-392 [Conf]
  22. Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor
    Design of heterogeneous ICs for mobile and personal communication systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:524-531 [Conf]
  23. J. Vanhoof, Ivo Bolsens, Hugo De Man
    Compiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:272-275 [Conf]
  24. Karl van Rompaey, Ivo Bolsens, Hugo De Man
    Just in Time Scheduling. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:295-300 [Conf]
  25. Evagelos Katsadas, Z. Sahraoui, M. Wouters, Veerle Derudder, Ivo Bolsens, Paul Six, Hugo De Man
    Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. [Citation Graph (0, 0)][DBLP]
    Synthesis for Control Dominated Circuits, 1992, pp:167-181 [Conf]
  26. Ivo Bolsens
    Challenges and Opportunities for FPGA Programmable System Platforms. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2003, pp:3- [Conf]
  27. Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man
    Synthesis of pipelined DSP accelerators with dynamic scheduling. [Citation Graph (0, 0)][DBLP]
    ISSS, 1995, pp:72-77 [Conf]
  28. Kristof Denolf, Peter Vos, Jan Bormans, Ivo Bolsens
    Cost-Efficient C-Level Design of an MPEG-4 Video Decoder. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2000, pp:233-242 [Conf]
  29. Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens
    A Technique for Combined Virtual Prototyping and Hardware Design. [Citation Graph (0, 0)][DBLP]
    International Workshop on Rapid System Prototyping, 1998, pp:156-161 [Conf]
  30. S. Samel, Bert Gyselinckx, Ivo Bolsens, Hugo De Man
    Designing Systems On Silicon: A Digital Spread Spectrum Pager. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:311-312 [Conf]
  31. Ivo Bolsens, Marco Cecchini
    IP-based business conflicts. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:4- [Journal]
  32. Hugo De Man, Ivo Bolsens, E. Vanden Meersch, Johan Van Cleynenbreugel
    DIALOG: An Expert Debugging System for MOSVLSI Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:3, pp:303-311 [Journal]
  33. Bart Vanhoof, Lode Nachtergaele, Gauthier Lafruit, Mercedes Peón, Bart Masschelein, Francky Catthoor, Jan Bormans, Ivo Bolsens
    A scalable MPEG-4 wavelet-based visual texture compression system with optimized memory organization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2003, v:13, n:4, pp:348-357 [Journal]
  34. Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man
    Synthesis of pipelined DSP accelerators with dynamic scheduling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:1, pp:59-68 [Journal]

  35. Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. [Citation Graph (, )][DBLP]

  36. Search space reduction through clustering in test generation. [Citation Graph (, )][DBLP]

  37. ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec. [Citation Graph (, )][DBLP]

  38. FPGA: The future platform for transforming, transporting and computing data. [Citation Graph (, )][DBLP]

  39. Keynote 1 NoCs: It is about the memory and the programming model. [Citation Graph (, )][DBLP]

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