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Jan M. Rabaey :
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Jason Cong , Tony Ma , Ivo Bolsens , Phil Moorby , Jan M. Rabaey , John Sanguinetti , Kazutoshi Wakabayashi , Yoshi Watanabe Are we ready for system-level synthesis? [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2005, pp:- [Conf ] Naji Ghazal , A. Richard Newton , Jan M. Rabaey Retargetable estimation scheme for DSP architecture selection. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2000, pp:485-490 [Conf ] Jan M. Rabaey Low-power silicon architecture for wireless communications: embedded tutorial. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2000, pp:377-380 [Conf ] Jan M. Rabaey Design at the end of the silicon roadmap. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2005, pp:- [Conf ] Allan Christian Long Jr. , Shankar Narayanaswamy , Andrew J. Burstein , Richard Han , Ken Lutz , Brian C. Richards , Samuel Sheng , Robert W. Brodersen , Jan M. Rabaey A prototype user interface for a mobile multimedia terminal. [Citation Graph (0, 0)][DBLP ] CHI 95 Conference Companion, 1995, pp:81-82 [Conf ] Julio Leao da Silva Jr. , Marco Sgroi , Fernando De Bernardinis , Suet-Fei Li , Alberto L. Sangiovanni-Vincentelli , Jan M. Rabaey Wireless protocols design: challenges and opportunities. [Citation Graph (0, 0)][DBLP ] CODES, 2000, pp:147-151 [Conf ] Eric A. Brewer , Thomas D. Burd , Frederick L. Burghard , Andrew J. Burstein , Roger Doering , Ken Lutz , Shankar Narayanaswamy , Trevor Pering , Brian C. Richards , Thomas E. Truman , Randy H. Katz , Jan M. Rabaey , Robert W. Brodersen Design of Wireless Portable Systems. [Citation Graph (0, 0)][DBLP ] COMPCON, 1995, pp:169-176 [Conf ] My T. Le , Frederick L. Burghard , Srinivasan Seshan , Jan M. Rabaey InfoNet: the Networking Infrastructure of InfoPad. [Citation Graph (0, 0)][DBLP ] COMPCON, 1995, pp:163-168 [Conf ] M. Josie Ammer , Michael Sheets , Tufan C. Karalar , Mika Kuulusa , Jan M. Rabaey A low-energy chip-set for wireless intercom. [Citation Graph (0, 0)][DBLP ] DAC, 2003, pp:916-919 [Conf ] Francine Bacchini , Jan M. Rabaey , Allan Cox , Frank Lane , Rudy Lauwereins , Ulrich Ramacher , David Witt Wireless platforms: GOPS for cents and MilliWatts. [Citation Graph (0, 0)][DBLP ] DAC, 2005, pp:351-352 [Conf ] Ole Bentz , Jan M. Rabaey , David Lidsky A Dynamic Design Estimation and Exploration Environment. [Citation Graph (0, 0)][DBLP ] DAC, 1997, pp:190-195 [Conf ] Naji Ghazal , A. Richard Newton , Jan M. Rabaey Predicting performance potential of modern DSPs. [Citation Graph (0, 0)][DBLP ] DAC, 2000, pp:332-335 [Conf ] Lisa Guerra , Miodrag Potkonjak , Jan M. Rabaey A Methodology for Guided Behavioral-Level Optimization. [Citation Graph (0, 0)][DBLP ] DAC, 1998, pp:309-314 [Conf ] David Lidsky , Jan M. Rabaey Early Power Exploration - A World Wide Web Application. [Citation Graph (0, 0)][DBLP ] DAC, 1996, pp:27-32 [Conf ] M. Potkonjack , Jan M. Rabaey A Scheduling and Resource Allocation Algorithm for Hierarchical Signal Flow Graphs. [Citation Graph (0, 0)][DBLP ] DAC, 1989, pp:7-12 [Conf ] Jan M. Rabaey , Joachim Kunkel , Dennis Brophy , Raul Camposano , Davoud Samani , Larry Lerner , Rick Hetherington What's the next EDA driver? [Citation Graph (0, 0)][DBLP ] DAC, 2002, pp:652- [Conf ] Jan M. Rabaey , Dennis Sylvester , David Blaauw , Kerry Bernstein , Jerry Frenkil , Mark Horowitz , Wolfgang Nebel , Takayasu Sakurai , Andrew Yang Reshaping EDA for power. [Citation Graph (0, 0)][DBLP ] DAC, 2003, pp:15- [Conf ] Marco Sgroi , Michael Sheets , Andrew Mihal , Kurt Keutzer , Sharad Malik , Jan M. Rabaey , Alberto L. Sangiovanni-Vincentelli Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design. [Citation Graph (0, 0)][DBLP ] DAC, 2001, pp:667-672 [Conf ] Paul Six , Luc J. M. Claesen , Jan M. Rabaey , Hugo De Man An intelligent module generator environment. [Citation Graph (0, 0)][DBLP ] DAC, 1986, pp:730-735 [Conf ] Roy A. Sutton , Vason P. Srini , Jan M. Rabaey A Multiprocessor DSP System Using PADDI-2. [Citation Graph (0, 0)][DBLP ] DAC, 1998, pp:62-65 [Conf ] Ingrid Verbauwhede , Chris J. Scheers , Jan M. Rabaey Memory Estimation for High Level Synthesis. [Citation Graph (0, 0)][DBLP ] DAC, 1994, pp:143-148 [Conf ] Radu Marculescu , Jan M. Rabaey , Alberto L. Sangiovanni-Vincentelli Is "Network" the next "Big Idea" in design? [Citation Graph (0, 0)][DBLP ] DATE, 2006, pp:254-256 [Conf ] Jan M. Rabaey , Marlene Wan An Energy-Conscious Exploration Methodology for Reconfigurable DSPs. [Citation Graph (0, 0)][DBLP ] DATE, 1998, pp:341-342 [Conf ] Julio Leao da Silva Jr. , J. Shamberger , M. Josie Ammer , C. Guo , Suet-Fei Li , Rahul C. Shah , Tim Tuan , Michael Sheets , Jan M. Rabaey , B. Nikolic , Alberto L. Sangiovanni-Vincentelli , Paul K. Wright Design methodology for PicoRadio networks. [Citation Graph (0, 0)][DBLP ] DATE, 2001, pp:314-325 [Conf ] Lisa Guerra , Miodrag Potkonjak , Jan M. Rabaey High Level Synthesis Techniques for Efficient Built-In-Self Repair. [Citation Graph (0, 0)][DBLP ] DFT, 1993, pp:41-48 [Conf ] Shan-Hsi Huang , Jan M. Rabaey Maximizing the Throughput of High Performance DSP Applications Using Behavioral Transformations. [Citation Graph (0, 0)][DBLP ] EDAC-ETC-EUROASIC, 1994, pp:25-30 [Conf ] Shad Roundy , Dan Steingart , Luc Frechette , Paul K. Wright , Jan M. Rabaey Power Sources for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP ] EWSN, 2004, pp:1-17 [Conf ] Jan M. Rabaey Silicon Platforms for the Next Generation Wireless Systems - What Role Does Reconfigurable Hardware Play? [Citation Graph (0, 0)][DBLP ] FPL, 2000, pp:277-285 [Conf ] Anantha Chandrakasan , Miodrag Potkonjak , Jan M. Rabaey , Robert W. Brodersen HYPER-LP: a system for power minimization using architectural transformations. [Citation Graph (0, 0)][DBLP ] ICCAD, 1992, pp:300-303 [Conf ] Miguel R. Corazao , Marwan A. Khalaf , Lisa M. Guerra , Miodrag Potkonjak , Jan M. Rabaey Instruction set mapping for performance optimization. [Citation Graph (0, 0)][DBLP ] ICCAD, 1993, pp:518-521 [Conf ] Lisa Guerra , Miodrag Potkonjak , Jan M. Rabaey High level synthesis for reconfigurable datapath structures. [Citation Graph (0, 0)][DBLP ] ICCAD, 1993, pp:26-29 [Conf ] Renu Mehra , Jan M. Rabaey Exploiting regularity for low-power design. [Citation Graph (0, 0)][DBLP ] ICCAD, 1996, pp:166-172 [Conf ] Miodrag Potkonjak , Jan M. Rabaey Optimizing Resource Utilization Using Transformations. [Citation Graph (0, 0)][DBLP ] ICCAD, 1991, pp:88-91 [Conf ] Miodrag Potkonjak , Jan M. Rabaey Maximally fast and arbitrarily fast implementation of linear computations. [Citation Graph (0, 0)][DBLP ] ICCAD, 1992, pp:304-308 [Conf ] Miodrag Potkonjak , Jan M. Rabaey Algorithm selection: a quantitative computation-intensive optimization approach. [Citation Graph (0, 0)][DBLP ] ICCAD, 1994, pp:90-95 [Conf ] Jan M. Rabaey , Miodrag Potkonjak , Farinaz Koushanfar , Suet-Fei Li , Tim Tuan Challenges and Opportunities in Broadband and Wireless Communication Designs. [Citation Graph (0, 0)][DBLP ] ICCAD, 2000, pp:76-82 [Conf ] Farinaz Koushanfar , Miodrag Potkonjak , Vandana Prabhu , Jan M. Rabaey Processors for Mobile Applications. [Citation Graph (0, 0)][DBLP ] ICCD, 2000, pp:603-608 [Conf ] My T. Le , Jan M. Rabaey A Global QoS Management for Wireless Network. [Citation Graph (0, 0)][DBLP ] IFIP World Conference on Mobile Communications, 1996, pp:205-218 [Conf ] Arthur Abnous , Katsunori Seno , Yuji Ichikawa , Marlene Wan , Jan M. Rabaey Evaluation of a Low-Power Reconfigurable DSP Architecture. [Citation Graph (0, 0)][DBLP ] IPPS/SPDP Workshops, 1998, pp:55-60 [Conf ] Konstantinos Sarrigeorgidis , Jan M. Rabaey Massively Parallel Wireless Reconfigurable Processor Architecture and Programming. [Citation Graph (0, 0)][DBLP ] IPDPS, 2003, pp:170- [Conf ] Francky Catthoor , Ed F. Deprettere , Yu Hen Hu , Jan M. Rabaey , Heinrich Meyr , Lothar Thiele Is it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures. [Citation Graph (0, 0)][DBLP ] ISCAS, 1994, pp:129-136 [Conf ] Yuen-Hui Chee , Jan M. Rabaey , Ali M. Niknejad A class A/B low power amplifier for wireless sensor networks. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 2004, pp:409-412 [Conf ] James Burr , Laszlo Gal , Ramsey W. Haddad , Jan M. Rabaey , Bruce Wooley Which has greater potential power impact: high-level design and algorithms or innovative low power technology? (panel). [Citation Graph (0, 0)][DBLP ] ISLPED, 1996, pp:175- [Conf ] George Varghese , Hui Zhang , Jan M. Rabaey The design of a low energy FPGA. [Citation Graph (0, 0)][DBLP ] ISLPED, 1999, pp:188-193 [Conf ] Paul E. Landman , Jan M. Rabaey Activity-sensitive architectural power analysis for the control path. [Citation Graph (0, 0)][DBLP ] ISLPD, 1995, pp:93-98 [Conf ] Eric Kusse , Jan M. Rabaey Low-energy embedded FPGA structures. [Citation Graph (0, 0)][DBLP ] ISLPED, 1998, pp:155-160 [Conf ] Jason M. Musicer , Jan M. Rabaey MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments. [Citation Graph (0, 0)][DBLP ] ISLPED, 2000, pp:102-107 [Conf ] Jan M. Rabaey Wireless beyond the third generation wireless beyond the third generation: facing the energy challenge. [Citation Graph (0, 0)][DBLP ] ISLPED, 2001, pp:1-3 [Conf ] Jan M. Rabaey System-level power estimation and optimization - challenges and perspectives. [Citation Graph (0, 0)][DBLP ] ISLPED, 1997, pp:158-160 [Conf ] Hui Zhang , Jan M. Rabaey Low-swing interconnect interface circuits. [Citation Graph (0, 0)][DBLP ] ISLPED, 1998, pp:161-166 [Conf ] Paul Friedberg , Yu Cao , Jason Cain , Ruth Wang , Jan M. Rabaey , Costas J. Spanos Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization. [Citation Graph (0, 0)][DBLP ] ISQED, 2005, pp:516-521 [Conf ] Huifang Qin , Yu Cao , Dejan Markovic , Andrei Vladimirescu , Jan M. Rabaey SRAM Leakage Suppression by Minimizing Standby Supply Voltage. [Citation Graph (0, 0)][DBLP ] ISQED, 2004, pp:55-60 [Conf ] Zhenyu (Jerry) Qi , Matthew M. Ziegler , Stephen V. Kosonocky , Jan M. Rabaey , Mircea R. Stan Multi-Dimensional Circuit and Micro-Architecture Level Optimization. [Citation Graph (0, 0)][DBLP ] ISQED, 2007, pp:275-280 [Conf ] Tufan C. Karalar , Shunzo Yamashita , Michael Sheets , Jan M. Rabaey An Integrated, Low Power Localization System for Sensor Networks. [Citation Graph (0, 0)][DBLP ] MobiQuitous, 2004, pp:24-30 [Conf ] Jan M. Rabaey Traveling the Wild Frontier of Ultra Low-Power Design. [Citation Graph (0, 0)][DBLP ] PATMOS, 2005, pp:747- [Conf ] Rahul C. Shah , Sven Wiethölter , Adam Wolisz , Jan M. Rabaey When Does Opportunistic Routing Make Sense? [Citation Graph (0, 0)][DBLP ] PerCom Workshops, 2005, pp:350-356 [Conf ] Chris Savarese , Jan M. Rabaey , Koen Langendoen Robust Positioning Algorithms for Distributed Ad-Hoc Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP ] USENIX Annual Technical Conference, General Track, 2002, pp:317-327 [Conf ] Jan M. Rabaey Invited Address: Hybrid Reconfigurable Processors - The Road to Low-Power Consumption. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1998, pp:300-303 [Conf ] Rahul C. Shah , Sven Wiethölter , Adam Wolisz , Jan M. Rabaey Modeling and Analysis of Opportunistic Routing in Low Traffic Scenarios. [Citation Graph (0, 0)][DBLP ] WiOpt, 2005, pp:294-304 [Conf ] Shad Roundy , Paul K. Wright , Jan M. Rabaey A study of low level vibrations as a power source for wireless sensor nodes. [Citation Graph (0, 0)][DBLP ] Computer Communications, 2003, v:26, n:11, pp:1131-1144 [Journal ] Jan M. Rabaey , M. Josie Ammer , Julio Leao da Silva Jr. , Danny Patel , Shad Roundy PicoRadio Supports Ad Hoc Ultra-Low Power Wireless Networking. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 2000, v:33, n:7, pp:42-48 [Journal ] Paul E. Landman , Renu Mehra , Jan M. Rabaey An Integrated CAD Environment for Low-Power Design. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1996, v:13, n:2, pp:72-82 [Journal ] Jan M. Rabaey , C. Chu , P. Hoang , Miodrag Potkonjak Fast Prototyping of Datapath-Intensive Architectures. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1991, v:8, n:2, pp:40-51 [Journal ] Johnathan M. Reason , Jan M. Rabaey A study of energy consumption and reliability in a multi-hop sensor network. [Citation Graph (0, 0)][DBLP ] Mobile Computing and Communications Review, 2004, v:8, n:1, pp:84-97 [Journal ] Anantha P. Chandrakasan , Miodrag Potkonjak , Renu Mehra , Jan M. Rabaey , Robert W. Brodersen Optimizing power using transformations. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:1, pp:12-31 [Journal ] Miguel R. Corazao , Marwan A. Khalaf , Lisa M. Guerra , Miodrag Potkonjak , Jan M. Rabaey Performance optimization using template mapping for datapath-intensive high-level synthesis. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:8, pp:877-888 [Journal ] Gert Goossens , Jan M. Rabaey , Joos Vandewalle , Hugo De Man An efficient microcode compiler for application specific DSP processors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:9, pp:925-937 [Journal ] Kurt Keutzer , A. Richard Newton , Jan M. Rabaey , Alberto L. Sangiovanni-Vincentelli System-level design: orthogonalization of concerns andplatform-based design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:12, pp:1523-1543 [Journal ] Paul E. Landman , Jan M. Rabaey Activity-sensitive architectural power analysis. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:6, pp:571-587 [Journal ] Jan M. Rabaey , Miodrag Potkonjak Estimating implementation bounds for real time DSP application specific circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:6, pp:669-683 [Journal ] Jan M. Rabaey , Stephen P. Pope , Robert W. Brodersen An Integrated Automated Layout Generation System for DSP Circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:3, pp:285-296 [Journal ] Miodrag Potkonjak , Jan M. Rabaey Maximally and arbitrarily fast implementation of linear andfeedback linear computations. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:1, pp:30-43 [Journal ] Miodrag Potkonjak , Jan M. Rabaey Optimizing resource utilization using transformations. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:3, pp:277-292 [Journal ] Miodrag Potkonjak , Jan M. Rabaey Algorithm selection: a quantitative optimization-intensive approach. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:5, pp:524-532 [Journal ] C. Bernard Shung , Rajeev Jain , Ken Rimey , Edward Wang , Mani B. Srivastava , Brian C. Richards , Erik Lettang , Syed Khalid Azim , Lars E. Thon , Paul N. Hilfinger , Jan M. Rabaey , Robert W. Brodersen An integrated CAD system for algorithm-specific IC design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:4, pp:447-463 [Journal ] Dragan Petrovic , Kannan Ramchandran , Jan M. Rabaey Overcoming untuned radios in wireless networks with network coding. [Citation Graph (0, 0)][DBLP ] IEEE Transactions on Information Theory, 2006, v:52, n:6, pp:2649-2657 [Journal ] Huifang Qin , Yu Cao , Dejan Markovic , Andrei Vladimirescu , Jan M. Rabaey Standby supply voltage minimization for deep sub-micron SRAM. [Citation Graph (0, 0)][DBLP ] Microelectronics Journal, 2005, v:36, n:9, pp:789-800 [Journal ] Jan M. Rabaey Design without Borders - A Tribute to the Legacy of A. Richard Newton. [Citation Graph (0, 0)][DBLP ] DAC, 2007, pp:- [Conf ] Animesh Kumar , Huifang Qin , Prakash Ishwar , Jan M. Rabaey , Kannan Ramchandran Fundamental Bounds on Power Reduction during Data-Retention in Standby SRAM. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:1867-1870 [Conf ] Paul E. Landman , Jan M. Rabaey Architectural power analysis: The dual bit type method. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1995, v:3, n:2, pp:173-187 [Journal ] Lisa M. Guerra , Miodrag Potkonjak , Jan M. Rabaey Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1998, v:6, n:1, pp:158-167 [Journal ] Hui Zhang , V. George , Jan M. Rabaey Low-swing on-chip signaling techniques: effectiveness and robustness. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2000, v:8, n:3, pp:264-272 [Journal ] Huifang Qin , Rakesh Vattikonda , Thuan Trinh , Yu Cao , Jan M. Rabaey SRAM Cell Optimization for Ultra-Low Power Standby. [Citation Graph (0, 0)][DBLP ] J. Low Power Electronics, 2006, v:2, n:3, pp:401-411 [Journal ] Konstantinos Sarrigeorgidis , Jan M. Rabaey A Scalable Configurable Architecture for Advanced Wireless Communication Algorithms. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:45, n:3, pp:127-151 [Journal ] A brand new wireless day. [Citation Graph (, )][DBLP ] PicoCube: a 1 cm3 sensor node powered by harvested energy. [Citation Graph (, )][DBLP ] Next generation wireless-multimedia devices: who is up for the challenge? [Citation Graph (, )][DBLP ] EDA in flux: should I stay or should I go? [Citation Graph (, )][DBLP ] Always energy-optimal microscopic wireless systems. [Citation Graph (, )][DBLP ] Design Without Borders. [Citation Graph (, )][DBLP ] Short Distance Wireless, Dense Networks, and Their Opportunities. [Citation Graph (, )][DBLP ] CGE: automatic generation of controllers in the CATHEDRAL-II silicon compiler. [Citation Graph (, )][DBLP ] More Moore: foolish, feasible, or fundamentally different? [Citation Graph (, )][DBLP ] Fundamental Data Retention Limits in SRAM Standby Experimental Results. [Citation Graph (, )][DBLP ] Error-Tolerant SRAM Design for Ultra-Low Power Standby Operation. [Citation Graph (, )][DBLP ] SRAM supply voltage scaling: A reliability perspective. [Citation Graph (, )][DBLP ] Technologies for an Autonomous Wireless Home Healthcare System. [Citation Graph (, )][DBLP ] Lightweight time synchronization for sensor networks. [Citation Graph (, )][DBLP ] Analysis of Interference Effects in MB-OFDM UWB Systems. [Citation Graph (, )][DBLP ] Multi-mode sub-Nyquist rate digital-to-analog conversion for direct waveform synthesis. [Citation Graph (, )][DBLP ] Workloads of the Future. [Citation Graph (, )][DBLP ] Challenges and Solutions for Late- and Post-Silicon Design. [Citation Graph (, )][DBLP ] The Search for Alternative Computational Paradigms. [Citation Graph (, )][DBLP ] Search in 0.014secs, Finished in 0.017secs