The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

T. Raju Damarla: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. T. Raju Damarla, Wei Su, Gerald T. Michael, Moon J. Chung, Charles E. Stroud
    A built-in self test scheme for VLSI. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1995, pp:- [Conf]
  2. T. Raju Damarla
    Fault Detection in Multiple Valued Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1990, pp:69-74 [Conf]
  3. T. Raju Damarla, Fiaz Hossain
    Spectral Techniques for Multiple-Valued Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1991, pp:340-346 [Conf]
  4. T. Raju Damarla, Moon J. Chung, Wei Su, Gerald T. Michael
    Faulty chip identification in a multi chip module system. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:254-259 [Conf]
  5. Charles E. Stroud, T. Raju Damarla
    Improving the efficiency of error identification via signature analysis. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:244-249 [Conf]
  6. T. Raju Damarla, Mark G. Karpovsky
    Fault Detection in Combinational Networks by Reed-Muller Transforms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:6, pp:788-797 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002