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Rajesh Radhakrishnan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Srinivasan Dasasathyan, Rajesh Radhakrishnan, Ranga Vemuri
    Framework for Synthesis of Virtual Pipelines. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:326-331 [Conf]
  2. Rajesh Radhakrishnan, Elena Teica, Ranga Vemuri
    Verification of Basic Block Schedules Using RTL Transformations. [Citation Graph (0, 0)][DBLP]
    CHARME, 2001, pp:173-178 [Conf]
  3. Elena Teica, Rajesh Radhakrishnan, Ranga Vemuri
    On the verification of synthesized designs using automatically generated transformational witnesses. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:798- [Conf]
  4. Srinivasan Dasasathyan, Rajesh Radhakrishnan, Ranga Vemuri
    Framework for Synthesis of Virtual Pipelines. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:326-331 [Conf]
  5. Manish Handa, Rajesh Radhakrishnan, Madhubanti Mukherjee, Ranga Vemuri
    A Fast Macro Based Compilation Methodology for Partially Reconfigurable FPGA Designs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:91-0 [Conf]
  6. Naren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri
    Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2001, v:19, n:3, pp:237-273 [Journal]

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