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Wen-Jong Fang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wen-Jong Fang, Peng-Cheng Kao, Allen C.-H. Wu
    A Multi-Level FPGA Synthesis Method Supporting HDL Debugging for Emulation-Based Designs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:351-354 [Conf]
  2. Wen-Jong Fang, Allen C.-H. Wu, Tsing-Gen Lee
    EMPAR: an interactive synthesis environment for hardware emulations. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1995, pp:- [Conf]
  3. Wen-Jong Fang, Allen C.-H. Wu
    Multi-Way FPGA Partitioning by Fully Exploiting Design Hierarchy. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:518-521 [Conf]
  4. Wen-Jong Fang, Allen C.-H. Wu
    Performance-Driven Multi-FPGA Partitioning Using Functional Clustering and Replication. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:283-286 [Conf]
  5. Wen-Jong Fang, Allen C.-H. Wu, Ti-Yen Yen
    A Real-Time RTL Engineering-Change Method Supporting On-Line Debugging for Logic-Emulation Applications. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:101-106 [Conf]
  6. Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen
    Module Generation of Complex Macros for Logic-Emulation Applications. [Citation Graph (0, 0)][DBLP]
    FPGA, 1997, pp:69-75 [Conf]
  7. Wen-Jong Fang, Allen C.-H. Wu
    A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:638-643 [Conf]
  8. Yu-Wen Tsay, Wen-Jong Fang, Allen C.-H. Wu, Youn-Long Lin
    Preserving HDL synthesis hierarchy for cell placement. [Citation Graph (0, 0)][DBLP]
    ISPD, 1997, pp:169-174 [Conf]
  9. Wen-Jong Fang, Allen C.-H. Wu
    Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:65-72 [Journal]
  10. Tsing-Gen Lee, Wen-Jong Fang, Allen C.-H. Wu
    The Design and Inplementation of a Cooperative Design-view Environment for Interactive Partitioning Applications. [Citation Graph (0, 0)][DBLP]
    Softw., Pract. Exper., 1996, v:26, n:10, pp:1141-1160 [Journal]
  11. Wen-Jong Fang, Allen C.-H. Wu
    A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:10, pp:1188-1195 [Journal]
  12. Wen-Jong Fang, Allen C.-H. Wu
    Multiway FPGA partitioning by fully exploiting design hierarchy. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2000, v:5, n:1, pp:34-50 [Journal]
  13. Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen
    EmGen-a module generator for logic emulation applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:488-492 [Journal]

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