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Lawrence A. Arledge Jr.:
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Publications of Author
- G. Peter Fang, David C. Yeh, David T. Zweidinger, Lawrence A. Arledge Jr., Vinod Gupta
Fast, accurate MOS table model for circuit simulation using an unstructured grid and preserving monotonicity. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2005, pp:1102-1106 [Conf]
- Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern, Richard Burch, Lawrence A. Arledge Jr., Paul F. Cox
A Parallel Block-Diagonal Preconditioned Conjugate-Gradient Solution Algorithm for Circuit and Device Simulations. [Citation Graph (0, 0)][DBLP] ICCAD, 1990, pp:446-449 [Conf]
- Jue-Hsien Chern, John T. Maeda, Lawrence A. Arledge Jr., Ping Yang
SIERRA: a 3-D device simulator for reliability modeling. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:516-527 [Journal]
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