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Michiko Miura-Mattausch: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ute Feldmann, R. Kakoschke, Michiko Miura-Mattausch, G. Schraud
    Concurrent Technology, Device, and Circuit Development for EEPROMs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:123-128 [Conf]
  2. D. Miyawaki, S. Matsumoto, Hans Jürgen Mattausch, S. Ooshiro, M. Suetake, Michiko Miura-Mattausch, Shigetaka Kumashiro, T. Yamaguchi, K. Yamashita, N. Nakayama
    Correlation method of circuit-performance and technology fluctuations for improved design reliability. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:39-44 [Conf]
  3. M. Tanaka, N. Tokida, T. Okagaki, Michiko Miura-Mattausch, Walter Hansch, Hans Jürgen Mattausch
    High performance of short-channel MOSFETs due to an elevated central-channel doping. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:365-370 [Conf]
  4. Morikazu Tsuno, Masato Suga, Masayasu Tanaka, Kentaro Shibahara, Michiko Miura-Mattausch, Masataka Hirose
    Reliable Threshold Voltage Determination for Sub-0.1µm Gate Length MOSFET's. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:111-116 [Conf]
  5. Michiko Miura-Mattausch, Ute Feldmann, Alexander Rahm, Michael Bollu, Dominique Savignac
    Unified complete MOSFET model for analysis of digital and analog circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:264-267 [Conf]
  6. Ute Feldmann, Alexander Rahm, Michiko Miura-Mattausch
    Benchmarking MOS Transistor Models with Respect to Capacitances and Charges for Analog Applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1352-1355 [Conf]
  7. Michiko Miura-Mattausch, Alexander Rahm, Michael Bollu, Ute Feldmann, Dominique Savignac
    A Novel Consistent MOSFET Model for CAD Application with Reduced Calculation Time. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:391-394 [Conf]
  8. Michiko Miura-Mattausch, Ute Feldmann, Alexander Rahm, Michael Bollu, Dominique Savignac
    Unified complete MOSFET model for analysis of digital and analog circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:1, pp:1-7 [Journal]

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