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Zuying Luo: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan
    A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:505-510 [Conf]
  2. Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan
    VLSI on-chip power/ground network optimization considering decap leakage currents. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:735-738 [Conf]
  3. Yongjun Xu, Jinghua Chen, Zuying Luo, Xiaowei Li
    Vector extraction for average total power estimation. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:1086-1089 [Conf]
  4. Zuying Luo, Xiaowei Li, Huawei Li, Shiyuan Yang, Yinghua Min
    Test Power Optimization Techniques for CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2002, pp:332-337 [Conf]
  5. Yongjun Xu, Zuying Luo, Zhiguo Chen, Xiaowei Li
    Average Leakage Current Macromodeling for Dual-Threshold Voltage Circuits. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:196-201 [Conf]
  6. Zuying Luo
    General transistor-level methodology on VLSI low-power design. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:115-118 [Conf]
  7. Weikun Guo, Sheldon X.-D. Tan, Zuying Luo, Xianlong Hong
    Partial random walk for large linear network analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:173-177 [Conf]
  8. Yongjun Xu, Zuying Luo, Xiaowei Li
    A maximum total leakage current estimation method. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:757-760 [Conf]
  9. Zhu Pan, Yici Cai, Sheldon X.-D. Tan, Zuying Luo, Xianlong Hong
    Transient Analysis of On-Chip Power Distribution Networks Using Equivalent Circuit Modeling. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:63-68 [Conf]
  10. Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan
    Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:433-441 [Conf]
  11. Yici Cai, Jin Shi, Zuying Luo, Xianlong Hong
    Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2005, v:20, n:2, pp:224-230 [Journal]
  12. Yongjun Xu, Zuying Luo, Xiaowei Li, Li-Jian Li, Xianlong Hong
    Leakage Current Estimation of CMOS Circuit with Stack Effect. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2004, v:19, n:5, pp:708-717 [Journal]
  13. Xiaohai Wu, Xianlong Hong, Yici Cai, Zuying Luo, Chung-Kuan Cheng, Jun Gu, Wayne Wei-Ming Dai
    Area minimization of power distribution network using efficient nonlinear programming techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:7, pp:1086-1094 [Journal]

  14. Statistic Analysis of Power/Ground Networks Using Single-Node SOR Method. [Citation Graph (, )][DBLP]


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