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Vivek Garg: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti
    A novel CLB architecture and circuit packing algorithm for logic-area reduction in SRAM-based FPGAs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:791-794 [Conf]
  2. Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti
    A function generator-based reconfigurable system. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:905-909 [Conf]
  3. Vivek Garg, David E. Schimmel
    Architectural Support for Inter-Stream Communication in a MSIMD System. [Citation Graph (0, 0)][DBLP]
    HPCA, 1995, pp:348-357 [Conf]
  4. Vivek Garg, David E. Schimmel
    Hiding Communication Latency in Data Parallel Applications. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:18-23 [Conf]
  5. Roger Su, Raman Mittal, Vivek Garg
    Synchronous Pipelined Relay Stations with Back-Pressure Tolerance. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2005, pp:517-520 [Conf]
  6. Vivek Garg, David E. Schimmel
    CCSIMD: A Concurrent Communication and Computation Framework for SIMD Machines. [Citation Graph (0, 0)][DBLP]
    PCRCW, 1997, pp:55-64 [Conf]
  7. James D. Allen, Vivek Garg, David E. Schimmel
    Analysis of Control Parallelism in SIMD Instruction Streams. [Citation Graph (0, 0)][DBLP]
    SPDP, 1993, pp:383-390 [Conf]
  8. Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti
    An Area and Configuration-Bit Optimized CLB Architecture and Timing-Driven Packing for FPGAs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:507-510 [Conf]
  9. Vivek Garg, David E. Schimmel
    Performance modeling of dense Cholesky factorization on the MasPar MP-2. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1997, v:9, n:7, pp:697-719 [Journal]

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