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Aart J. de Geus: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Aart J. de Geus
    Electronic Industry on Fire: How to Survive and Thrive. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:6- [Conf]
  2. Joseph B. Costello, Walden C. Rhines, Aart J. de Geus, Alain Hanover, Doug Fairbairn, Rick Carlson, Ronald Collett
    Executive Perspective and Vision of the Future of EDA (Panel). [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:48- [Conf]
  3. Robert Dahlberg, Kurt Keutzer, R. Bingham, Aart J. de Geus, Walden C. Rhines
    EDA: this is serious business. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:1- [Conf]
  4. David Gregory, Karen A. Bartlett, Aart J. de Geus, Gary D. Hachtel
    SOCRATES: a system for automatically synthesizing and optimizing combinational logic. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:79-85 [Conf]
  5. Aart J. de Geus
    Logic synthesis and optimization benchmarks for the 1986 Design Automation Conference. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:78- [Conf]
  6. Jay Vleeschhouwer, Warren East, Michael J. Fister, Aart J. de Geus, Walden C. Rhines, Jackson Hu, Rick Cassidy
    Differentiate and deliver: leveraging your partners. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:1- [Conf]
  7. Aart J. de Geus
    High Level Design: A Design Vision for the 90's. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:8- [Conf]
  8. Aart J. de Geus
    Slap it Together and Ship it! [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:23-24 [Conf]
  9. Aart J. de Geus
    Test: The New Value-Added Field. [Citation Graph (0, 0)][DBLP]
    ITC, 1994, pp:12- [Conf]
  10. Aart J. de Geus
    Electronic Industry on Fire: How to Survive and Thrive. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:6- [Conf]
  11. Allen Dewey, Aart J. de Geus
    VHDL: Toward a Unified View of Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1992, v:9, n:2, pp:8-17 [Journal]
  12. Karen A. Bartlett, William W. Cohen, Aart J. de Geus, Gary D. Hachtel
    Synthesis and Optimization of Multilevel Logic under Timing Constraints. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:4, pp:582-596 [Journal]
  13. Robert Lisanke, Franc Brglez, Aart J. de Geus, David Gregory
    Testability-Driven Random Test-Pattern Generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:6, pp:1082-1087 [Journal]
  14. Francine Bacchini, Greg Spirakis, Juan Antonio Carballo, Kurt Keutzer, Aart J. de Geus, Fu-Chieh Hsu, Kazu Yamada
    Megatrends and EDA 2017. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:21-22 [Conf]

  15. A. Richard Newton: Technologist with a Mission. [Citation Graph (, )][DBLP]


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