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Bita Gorjiara: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David Jensen
    Fast and efficient voltage scheduling by evolutionary slack distribution. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:659-662 [Conf]
  2. Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski
    Designing a custom architecture for DCT using NISC technology. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:116-117 [Conf]
  3. Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski
    Generic netlist representation for system and PE level design exploration. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2006, pp:282-287 [Conf]
  4. Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski
    A Graph Based Algorithm for Data Path Optimization in Custom Processors. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:496-503 [Conf]
  5. Bita Gorjiara, Daniel D. Gajski
    Custom Processor Design Using NISC: A Case-Study on DCT algorithm. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2005, pp:55-60 [Conf]
  6. Bita Gorjiara, Daniel Gajski
    FPGA-friendly code compression for horizontal microcoded custom IPs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2007, pp:108-115 [Conf]
  7. Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski
    Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:69-76 [Conf]
  8. Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
    An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:381-386 [Conf]
  9. Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
    Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]

  10. Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost. [Citation Graph (, )][DBLP]


  11. Automatic architecture refinement techniques for customizing processing elements. [Citation Graph (, )][DBLP]


  12. C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). [Citation Graph (, )][DBLP]


  13. A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs. [Citation Graph (, )][DBLP]


  14. Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . [Citation Graph (, )][DBLP]


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