The SCEAS System
Navigation Menu

Search the dblp DataBase


Scott Y. L. Chin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton
    Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-8 [Conf]

  2. Improving the memory footprint and runtime scalability of FPGA CAD algorithms. [Citation Graph (, )][DBLP]

  3. An analytical model relating FPGA architecture and place and route runtime. [Citation Graph (, )][DBLP]

Search in 0.001secs, Finished in 0.001secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002