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Li Shang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert P. Dick, Li Shang
    TAPHS: thermal-aware unified physical-level and high-level synthesis. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:879-885 [Conf]
  2. Li Shang, Niraj K. Jha
    Hardware-Software Co-Synthesis of Low Power Real-Time Distributed Embedded Systems with Dynamically Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:345-354 [Conf]
  3. Li Shang, Deshuang Huang
    Image Denoising Using Non-Negative Sparse Coding Shrinkage Algorithm. [Citation Graph (0, 0)][DBLP]
    CVPR (1), 2005, pp:1017-1022 [Conf]
  4. Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K. Jha
    HybDTM: a coordinated hardware-software approach for dynamic thermal management. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:548-553 [Conf]
  5. Wei Zhang, Niraj K. Jha, Li Shang
    NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:711-716 [Conf]
  6. Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li Shang, Robert P. Dick
    Adaptive chip-package thermal analysis for synthesis and design. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:844-849 [Conf]
  7. Li Shang, Alireza Kaviani, Kusuma Bathala
    Dynamic power consumption in Virtex[tm]-II FPGA family. [Citation Graph (0, 0)][DBLP]
    FPGA, 2002, pp:157-164 [Conf]
  8. Weidong Wang, Tat Kee Tan, Jiong Luo, Yunsi Fei, Li Shang, Keith S. Vallerio, Lin Zhong, Anand Raghunathan, Niraj K. Jha
    A comprehensive high-level synthesis system for control-flow intensive behaviors. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:11-14 [Conf]
  9. Li Shang, Li-Shiuan Peh, Niraj K. Jha
    Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    HPCA, 2003, pp:91-102 [Conf]
  10. Yonghong Yang, Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert P. Dick
    Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:575-582 [Conf]
  11. Li Shang, Niraj K. Jha
    High-Level Power Modeling of CPLDs and FPGAs. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:46-53 [Conf]
  12. Chun-Hou Zheng, Li Shang, Yan Chen, Zhi-Kai Huang
    Penalized Independent Component Discriminant Method for Tumor Classification. [Citation Graph (0, 0)][DBLP]
    ICIC (3), 2006, pp:494-503 [Conf]
  13. Li Shang, Li-Shiuan Peh, Niraj K. Jha
    PowerHerd: dynamic satisfaction of peak power constraints in interconnection networks. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:98-108 [Conf]
  14. Li Shang, Deshuang Huang, Chunhou Zheng, Zhanli Sun
    Image Feature Extraction Based on an Extended Non-negative Sparse Coding Neural Network Model. [Citation Graph (0, 0)][DBLP]
    ISNN (2), 2005, pp:807-812 [Conf]
  15. Li Shang, De-Shuang Huang, Ji-Xiang Du, Zhi-Kai Huang
    Palmprint Recognition Using ICA Based on Winner-Take-All Network and Radial Basis Probabilistic Neural Network. [Citation Graph (0, 0)][DBLP]
    ISNN (2), 2006, pp:216-221 [Conf]
  16. Chunhou Zheng, Deshuang Huang, Zhanli Sun, Li Shang
    Post-nonlinear Blind Source Separation Using Neural Networks with Sandwiched Structure. [Citation Graph (0, 0)][DBLP]
    ISNN (2), 2005, pp:478-483 [Conf]
  17. Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wang, Li Shang
    Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ISQED, 2007, pp:204-209 [Conf]
  18. Li Shang, Li-Shiuan Peh, Amit Kumar 0002, Niraj K. Jha
    Thermal Modeling, Characterization and Management of On-Chip Networks. [Citation Graph (0, 0)][DBLP]
    MICRO, 2004, pp:67-78 [Conf]
  19. Noel Eisley, Li-Shiuan Peh, Li Shang
    In-Network Cache Coherence. [Citation Graph (0, 0)][DBLP]
    MICRO, 2006, pp:321-332 [Conf]
  20. Li Shang, Robert P. Dick, Niraj K. Jha
    An Economics-based Power-aware Protocol for Computation Distribution in Mobile Ad-Hoc Networks. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:339-344 [Conf]
  21. Li Shang, Niraj K. Jha
    Hardware-Software Co-Synthesis of Low Power Real-Time Distributed Embedded Systems with Dynamically Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:345-0 [Conf]
  22. Li Shang, Li-Shiuan Peh, Niraj K. Jha
    Power-efficient Interconnection Networks: Dynamic Voltage Scaling with Links. [Citation Graph (0, 0)][DBLP]
    Computer Architecture Letters, 2002, v:1, n:, pp:- [Journal]
  23. Li Shang, Deshuang Huang, Chunhou Zheng, Zhan-Li Sun
    Noise removal using a novel non-negative sparse coding shrinkage technique. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2006, v:69, n:7-9, pp:874-877 [Journal]
  24. Zhan-Li Sun, De-Shuang Huang, Chun-Hou Zheng, Li Shang
    Using batch algorithm for kernel blind source separation. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2005, v:69, n:1-3, pp:273-278 [Journal]
  25. Zhan-Li Sun, De-Shuang Huang, Chun-Hou Zheng, Li Shang
    Optimal selection of time lags for TDSEP based on genetic algorithm. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2006, v:69, n:7-9, pp:884-887 [Journal]
  26. Li Shang, Li-Shiuan Peh, Amit Kumar 0002, Niraj K. Jha
    Temperature-Aware On-Chip Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:1, pp:130-139 [Journal]
  27. Li Shang, Feng-Wen Cao
    Adaptive Denoising Using a Modified Sparse Coding Shrinkage Method. [Citation Graph (0, 0)][DBLP]
    Neural Processing Letters, 2006, v:24, n:2, pp:153-162 [Journal]
  28. Li Shang, Li-Shiuan Peh, Niraj K. Jha
    PowerHerd: a distributed scheme for dynamically satisfying peak-power constraints in interconnection networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:1, pp:92-110 [Journal]
  29. Li Shang, Robert P. Dick, Niraj K. Jha
    DESP: A Distributed Economics-Based Subcontracting Protocol for Computation Distribution in Power-Aware Mobile Ad Hoc Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Mob. Comput., 2004, v:3, n:1, pp:33-45 [Journal]
  30. Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert P. Dick, Robert G. Knobel
    Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:312-317 [Conf]
  31. Wei Zhang, Li Shang, Niraj K. Jha
    NanoMap: An Integrated Design Optimization Flow for a Hybrid Nanotube/CMOS Dynamically Reconfigurable Architecture. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:300-305 [Conf]
  32. Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Yang
    Accurate temperature-dependent integrated circuit leakage power estimation is easy. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1526-1531 [Conf]
  33. Xiangzhen Kong, Chunhou Zheng, Yuqiang Wu, Li Shang
    Molecular Cancer Class Discovery Using Non-negative Matrix Factorization with Sparseness Constraint. [Citation Graph (0, 0)][DBLP]
    ICIC (1), 2007, pp:792-802 [Conf]
  34. Li Shang, Fenwen Cao, Zhiqiang Zhao, Jie Chen, Yu Zhang
    Palmprint Recognition Using a Novel Sparse Coding Technique. [Citation Graph (0, 0)][DBLP]
    ISNN (2), 2007, pp:810-818 [Conf]
  35. Li Shang, De-Shuang Huang, Ji-Xiang Du, Chun-Hou Zheng
    Palmprint recognition using FastICA algorithm and radial basis probabilistic neural network. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2006, v:69, n:13-15, pp:1782-1786 [Journal]
  36. Chun-Hou Zheng, De-Shuang Huang, Li Shang
    Feature selection in independent component subspace for microarray data classification. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2006, v:69, n:16-18, pp:2407-2410 [Journal]
  37. David Brooks, Robert P. Dick, Russ Joseph, Li Shang
    Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2007, v:27, n:3, pp:49-62 [Journal]

  38. Leveraging on-chip networks for data cache migration in chip multiprocessors. [Citation Graph (, )][DBLP]


  39. Multi-optimization power management for chip multiprocessors. [Citation Graph (, )][DBLP]


  40. A platform for developing adaptable multicore applications. [Citation Graph (, )][DBLP]


  41. Reliable multiprocessor system-on-chip synthesis. [Citation Graph (, )][DBLP]


  42. Three-dimensional multiprocessor system-on-chip thermal optimization. [Citation Graph (, )][DBLP]


  43. Process variation characterization of chip-level multiprocessors. [Citation Graph (, )][DBLP]


  44. Multicore parallel min-cost flow algorithm for CAD applications. [Citation Graph (, )][DBLP]


  45. Spectrum: a hybrid nanophotonic-electric on-chip network. [Citation Graph (, )][DBLP]


  46. Statistical reliability analysis under process variation and aging effects. [Citation Graph (, )][DBLP]


  47. Adaptive Simulation for Single-Electron Devices. [Citation Graph (, )][DBLP]


  48. Latency criticality aware on-chip communication. [Citation Graph (, )][DBLP]


  49. Reliability- and process variation-aware placement for FPGAs. [Citation Graph (, )][DBLP]


  50. Properties of and improvements to time-domain dynamic thermal analysis algorithms. [Citation Graph (, )][DBLP]


  51. Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm. [Citation Graph (, )][DBLP]


  52. 3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits. [Citation Graph (, )][DBLP]


  53. ThermalScope: multi-scale thermal analysis for nanometer-scale integrated circuits. [Citation Graph (, )][DBLP]


  54. Temperature-aware test scheduling for multiprocessor systems-on-chip. [Citation Graph (, )][DBLP]


  55. Image Reconstruction Using a Modified Sparse Coding Technique. [Citation Graph (, )][DBLP]


  56. Image Reconstruction Using NMF with Sparse Constraints Based on Kurtosis Measurement Criterion. [Citation Graph (, )][DBLP]


  57. Face Recognition Using the Feature Fusion Technique Based on LNMF and NNSC Algorithms. [Citation Graph (, )][DBLP]


  58. Palmprint Recognition Method Using WTA-ICA Based on 2DPCA. [Citation Graph (, )][DBLP]


  59. Palm Line Extraction Using FRIT. [Citation Graph (, )][DBLP]


  60. Quantum Collapsing Median Filter. [Citation Graph (, )][DBLP]


  61. A high-performance low-power nanophotonic on-chip network. [Citation Graph (, )][DBLP]


  62. Power-efficient variation-aware photonic on-chip network management. [Citation Graph (, )][DBLP]


  63. Large-scale battery system modeling and analysis for emerging electric-drive vehicles. [Citation Graph (, )][DBLP]


  64. Hybrid energy storage system integration for vehicles. [Citation Graph (, )][DBLP]


  65. A New Denoising Approach for Sound Signals Based on Non-negative Sparse Coding of Power Spectra. [Citation Graph (, )][DBLP]


  66. Denoising Natural Images Using Sparse Coding Algorithm Based on the Kurtosis Measurement. [Citation Graph (, )][DBLP]


  67. Palmprint Recognition Using 2D-Gabor Wavelet Based Sparse Coding and RBPNN Classifier. [Citation Graph (, )][DBLP]


  68. iScope: personalized multi-modality image search for mobile devices. [Citation Graph (, )][DBLP]


  69. In-network cache coherence. [Citation Graph (, )][DBLP]


  70. Degree conditions for graphs to be lambda3-optimal and super-lambda3. [Citation Graph (, )][DBLP]


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