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Title:
Author:
Ahmet T. Erdogan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wei Han, Ahmet T. Erdogan, Tughrul Arslan, M. Hasan
    The development of high performance FFT IP cores through hybrid low power algorithmic methodology. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:549-552 [Conf]
  2. Muhammad Akhtar Khan, Abdul Hameed, Ahmet T. Erdogan
    Low Power Programmable FIR Filtering IP Cores Targeting System-on-a-Reprogrammable-Chip (SoRC). [Citation Graph (0, 0)][DBLP]
    ERSA, 2006, pp:178-183 [Conf]
  3. Yutian Zhao, Ahmet T. Erdogan, Tughrul Arslan
    A Low-Power and Domain-Specific Reconfigurable FFT Fabric for System-on-Chip Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  4. Ahmet T. Erdogan, Tughrul Arslan
    Low power block based FIR filtering cores. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:341-344 [Conf]
  5. Yao Gang, Tughrul Arslan, Ahmet T. Erdogan
    An efficient pre-traceback approach for Viterbi decoding in wireless communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5441-5444 [Conf]
  6. Wei Han, Ahmet T. Erdogan, Tughrul Arslan, M. Hasan
    Low power commutator for pipelined FFT processors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:5274-5277 [Conf]
  7. Yutian Zhao, Ahmet T. Erdogan, Tughrul Arslan
    A novel low-power reconfigurable FFT processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:41-44 [Conf]
  8. Jichuan Zhao, Ahmet T. Erdogan, Tughrul Arslan
    A novel application specific network protocol for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5894-5897 [Conf]
  9. A. C. McCormick, P. M. Grant, John S. Thompson, Tughrul Arslan, Ahmet T. Erdogan
    A low power MMSE receiver architecture for multi-carrier CDMA. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:41-44 [Conf]
  10. Ahmet T. Erdogan, Tughrul Arslan
    A coefficient segmentation algorithm for low power implementation of FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:359-362 [Conf]
  11. Tughrul Arslan, Ahmet T. Erdogan
    Low power implementation of high throughput FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:373-376 [Conf]
  12. Ahmet T. Erdogan, Tughrul Arslan
    Low Power FIR Filter Implementations Based on Coefficient Ordering Algorithm. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:226-228 [Conf]
  13. J. H. Han, Ahmet T. Erdogan, Tughrul Arslan
    High Speed Max-Log-MAP Turbo SISO Decoder Implementation Using Branch Metric Normalization. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:173-178 [Conf]
  14. Kristian Hildingsson, Tughrul Arslan, Ahmet T. Erdogan
    Energy Evaluation Methodology for Platform Based System-on-Chip Design. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:61-68 [Conf]
  15. Zahid Khan, John S. Thompson, Tughrul Arslan, Ahmet T. Erdogan
    Enhanced Dual Strategy based VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:12-17 [Conf]
  16. T. Takahashi, Ahmet T. Erdogan, Tughrul Arslan, J. H. Han
    Low Power Layered Space-Time Channel Detector Architecture for MIMO Systems. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:444-445 [Conf]
  17. J. H. Han, Ahmet T. Erdogan, Tughrul Arslan
    A Low Power Pipelined Maximum Likelihood Detector for 4x4 QPSK MIMO Wireless Communication Systems. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:185-192 [Conf]
  18. Ashwin K. Kumaraswamy, Ahmet T. Erdogan, Indrajit Atluri
    Development of Timing Driven IP Design Flow based on Physical Knowledge Synthesis. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2004, pp:193-197 [Conf]
  19. Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
    A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:585-592 [Conf]
  20. Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
    Crosstalk Immune Coding from Area and Power Perspective for high performance AMBA based SoC systems. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:314-317 [Conf]
  21. Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
    A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:751-756 [Conf]
  22. Zahid Khan, Tughrul Arslan, John S. Thompson, Ahmet T. Erdogan
    Area and Power Efficient VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:734-737 [Conf]
  23. Mark P. Tennant, Ahmet T. Erdogan, Tughrul Arslan, John S. Thompson
    A Novel Architecture Using the Decorrelating Transform for Low Power Adaptive Filters. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:263-268 [Conf]
  24. C. H. Wang, Ahmet T. Erdogan, Tughrul Arslan
    Algorithmic Implementation of Low-Power High Performance FIR Filtering IP Cores. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:659-662 [Conf]
  25. J. H. Han, Ahmet T. Erdogan, Tughrul Arslan
    A Power and Area Efficient Maximum Likelihood Detector Implementation for High Throughput MIMO Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:756-762 [Conf]
  26. Asral Bahari, Tughrul Arslan, Ahmet T. Erdogan
    Interframe Bus Encoding Technique for Low Power Video Compression. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:691-698 [Conf]
  27. Zahid Khan, Tughrul Arslan, John S. Thompson, Ahmet T. Erdogan
    Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:744-749 [Conf]
  28. Syamsiah Mashohor, Jonathan R. Evans, Ahmet T. Erdogan
    Automatic Hybrid Genetic Algorithm Based Printed Circuit Board Inspection. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:390-400 [Conf]
  29. Jichuan Zhao, Ahmet T. Erdogan
    A Novel Self-Organizing Hybrid Network Protocol for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:412-419 [Conf]
  30. Nasri Sulaiman, Ahmet T. Erdogan
    A Multi-Objective Genetic Algorithm for On-Chip Real-time Adaptation of a Multi-Carrier Based Telecommunications Receiver. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:424-427 [Conf]
  31. B. Ahmad, Ahmet T. Erdogan, Sami Khawam
    Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:405-411 [Conf]
  32. Tughrul Arslan, Nakul Haridas, Erfu Yang, Ahmet T. Erdogan, Nick Barton, A. J. Walton, John S. Thompson, Adrian Stoica, T. Vladimirova, Klaus D. McDonald-Maier, W. G. J. Howells
    ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:323-329 [Conf]
  33. Nakul Haridas, Ahmet T. Erdogan, Tughrul Arslan, Mark Begbie
    Adaptive Micro-Antenna on Silicon Substrate. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:43-50 [Conf]
  34. Zahid Khan, Tughrul Arslan, John S. Thompson, Ahmet T. Erdogan
    A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1569-1574 [Conf]
  35. Erfu Yang, Ahmet T. Erdogan, Tughrul Arslan, Nick Barton
    System-Level Modeling and Multi-objective Evolutionary Design of Pipelined FFT Processors for Wireless OFDM Receivers. [Citation Graph (0, 0)][DBLP]
    ICES, 2007, pp:210-221 [Conf]
  36. Nazish Aslam, Mark Milward, Ioannis Nousias, Tughrul Arslan, Ahmet T. Erdogan
    Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-7 [Conf]
  37. Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan
    Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1875-1878 [Conf]
  38. Asral Bahari, Tughrul Arslan, Ahmet T. Erdogan
    Low power variable block size motion estimation using pixel truncation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3663-3666 [Conf]
  39. Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
    An embedded low power reconfigurable fabric for finite state machine operations. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  40. Mark P. Tennant, Ahmet T. Erdogan, Tughrul Arslan, John S. Thompson
    A novel equaliser architecture with dynamic length optimisation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  41. Zahid Khan, Tughrul Arslan, John S. Thompson, Ahmet T. Erdogan
    Analysis and Implementation of Multiple-Input, Multiple-Output VBLAST Receiver From Area and Power Efficiency Perspective. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:11, pp:1281-1286 [Journal]

  42. A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications. [Citation Graph (, )][DBLP]


  43. An ILP formulation for task mapping and scheduling on multi-core architectures. [Citation Graph (, )][DBLP]


  44. Implementation of Hardware Encryption Engine for Wireless Communication on a Reconfigurable Instruction Cell Architecture. [Citation Graph (, )][DBLP]


  45. SystemC-based Custom Reconfigurable Cores for Wireless Applications. [Citation Graph (, )][DBLP]


  46. Code Compressor and Decompressor for Ultra Large Instruction Width Coarse-Grain Reconfigurable Systems. [Citation Graph (, )][DBLP]


  47. Mapping Real Time Operating System on Reconfigurable Instruction Cell Based Architectures. [Citation Graph (, )][DBLP]


  48. The Design of Multitasking Based Applications on Reconfigurable Instruction Cell Bsed Architectures. [Citation Graph (, )][DBLP]


  49. System-level Modelling and Analysis of Embedded Reconfigurable Cores for Wireless Systems. [Citation Graph (, )][DBLP]


  50. Scalability of a Novel Shifting Balance Theory-Based Optimization Algorithm: A Comparative Study on a Cluster-Based Wireless Sensor Network. [Citation Graph (, )][DBLP]


  51. Low Power Hardware Architecture for VBSME Using Pixel Truncation. [Citation Graph (, )][DBLP]


  52. A Novel Sampling Scheme for Efficient Analog to Digital Conversion. [Citation Graph (, )][DBLP]


  53. Multiobjective Optimal Design of MEMS-Based Reconfigurable and Evolvable Sensor Networks for Space Applications. [Citation Graph (, )][DBLP]


  54. Multi-Frequency Antenna design for Space-based Reconfigurable Satellite Sensor Node. [Citation Graph (, )][DBLP]


  55. High Performance Embedded Reconfigurable Concatenated Convolution- Puncturing Fabric for 802.16. [Citation Graph (, )][DBLP]


  56. Fault tolerant cellular Genetic Algorithm. [Citation Graph (, )][DBLP]


  57. A novel shifting balance theory-based approach to optimization of an energy-constrained modulation scheme for wireless sensor networks. [Citation Graph (, )][DBLP]


  58. A distributed cellular GA based architecture for real time GPS attitude determination. [Citation Graph (, )][DBLP]


  59. Exploiting loop-level parallelism on multi-core architectures for the wimax physical layer. [Citation Graph (, )][DBLP]


  60. A novel CMOS exponential approximation circuit. [Citation Graph (, )][DBLP]


  61. OFDM symbol timing synchronization system on a Reconfigurable Instruction Cell Array. [Citation Graph (, )][DBLP]


  62. Evaluation of contrast limited adaptive histogram equalization (CLAHE) enhancement on a FPGA. [Citation Graph (, )][DBLP]


  63. Heterogeneous multi-core architectures with dynamically reconfigurable processors for wireless communication. [Citation Graph (, )][DBLP]


  64. Low Computation and Memory Access for Variable Block Size Motion Estimation Using Pixel Truncation. [Citation Graph (, )][DBLP]


  65. I2S3 the Integrated Intelligent Secure Sensor Systems Project. [Citation Graph (, )][DBLP]


  66. Multi-Objective Evolutionary Optimizations of a Space-Based Reconfigurable Sensor Network under Hard Constraints. [Citation Graph (, )][DBLP]


  67. An Improved Particle Swarm Optimization Algorithm for Power-Efficient Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  68. The Re-emission Side Channel. [Citation Graph (, )][DBLP]


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