M. Hasan, Tughrul Arslan A triple port RAM based low power commutator architecture for a pipelined FFT processor. [Citation Graph (0, 0)][DBLP] ISCAS (5), 2003, pp:353-356 [Conf]
M. Hasan, Farrokh Marvasti A cascaded MAP-based linear prediction (CMAP-LP) error concealment technique for consecutive block losses. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2001, pp:329-332 [Conf]