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Publications of Author

1. Yu Huang, Sudhakar M. Reddy, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, Yanping Zhang, Wu-Tung Cheng
   Constraint Driven Pin Mapping for Concurrent SOC Testing. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2002, pp:511-516 [Conf]
   
2. Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy
   Resource Allocation and Test Scheduling for Concurrent Test of Core-Based SoC D. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2001, pp:265-0 [Conf]
   
3. Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng, Paul Reuter, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan
   Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm. [Citation Graph (0, 0)][DBLP]
   ITC, 2002, pp:74-82 [Conf]
   
4. Yu Huang, Chien-Chung Tsai, Neelanjan Mukherjee, Omer Samman, Dan Devries, Wu-Tung Cheng, Sudhakar M. Reddy
   On RTL scan design. [Citation Graph (0, 0)][DBLP]
   ITC, 2001, pp:728-737 [Conf]
   
5. Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Omer Samman, Paul Policke, Sherry Lai
   BIST for Deep Submicron ASIC Memories with High Performance Application. [Citation Graph (0, 0)][DBLP]
   ITC, 2003, pp:386-392 [Conf]
   
6. Yu Huang, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, Yanping Zhang, Wu-Tung Cheng, Sudhakar M. Reddy
   Constraint Driven Pin Mapping for Concurrent SOC Testing. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2002, pp:511-516 [Conf]