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Soonhoi Ha: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hyeyoung Hwang, Taewook Oh, Hyunuk Jung, Soonhoi Ha
    Conversion of reference C code to dataflow model: H.264 encoder case study. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:152-157 [Conf]
  2. Dohyung Kim, Soonhoi Ha
    Static analysis and automatic code synthesis of flexible FSM model. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:161-165 [Conf]
  3. Yongjoo Kim, Kyuseok Kim, Youngsoo Shin, Taekyoon Ahn, Wonyong Sung, Kiyoung Choi, Soonhoi Ha
    An integrated hardware-software cosimulation environment for heterogeneous systems prototyping. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1995, pp:- [Conf]
  4. KiSeun Kwon, Youngmin Yi, Dohyung Kim, Soonhoi Ha
    Embedded software generation from system level specification for multi-tasking embedded systems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:145-150 [Conf]
  5. Hyunok Oh, Soonhoi Ha
    Data memory minimization by sharing large size buffers. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:491-496 [Conf]
  6. Hyunok Oh, Nikil Dutt, Soonhoi Ha
    Memory optimal single appearance schedule with dynamic loop count for synchronous dataflow graphs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:497-502 [Conf]
  7. Chanik Park, Sungchan Kim, Soonhoi Ha
    A dataflow specification for system level synthesis of 3D graphics applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:78-84 [Conf]
  8. Wonyong Sung, Soonhoi Ha
    A Hardware Software Cosimulation Backplane with Automatic Interface Generation. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:177-182 [Conf]
  9. Hyunok Oh, Nikil D. Dutt, Soonhoi Ha
    Single appearance schedule with dynamic loop count for minimum data buffer from synchronous dataflow graphs. [Citation Graph (0, 0)][DBLP]
    CASES, 2005, pp:157-165 [Conf]
  10. Yangsuk Kee, Soonhoi Ha
    xBSP: An Efficient BSP Implementation for clan. [Citation Graph (0, 0)][DBLP]
    CCGRID, 2001, pp:237-244 [Conf]
  11. Hyunok Oh, Soonhoi Ha
    Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:133-138 [Conf]
  12. Hyunok Oh, Soonhoi Ha
    A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling. [Citation Graph (0, 0)][DBLP]
    CODES, 1999, pp:183-187 [Conf]
  13. Hyunuk Jung, Soonhoi Ha
    Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2004, pp:24-29 [Conf]
  14. Sungchan Kim, Chaeseok Im, Soonhoi Ha
    Schedule-aware performance estimation of communication architecture for efficient design space exploration. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:195-200 [Conf]
  15. Hyunok Oh, Nikil D. Dutt, Soonhoi Ha
    Shift buffering technique for automatic code synthesis from synchronous dataflow graphs. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:51-56 [Conf]
  16. Sungchan Kim, Chaeseok Im, Soonhoi Ha
    Efficient exploration of on-chip bus architectures and memory allocation. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2004, pp:248-253 [Conf]
  17. Youngmin Yi, Dohyung Kim, Soonhoi Ha
    Virtual synchronization technique with OS modeling for fast and time-accurate cosimulation. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:1-6 [Conf]
  18. Dohyung Kim, Youngmin Yi, Soonhoi Ha
    Trace-driven HW/SW cosimulation using virtual synchronization technique. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:345-348 [Conf]
  19. Hyunok Oh, Soonhoi Ha
    Efficient code synthesis from extended dataflow graphs for multimedia applications. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:275-280 [Conf]
  20. Moonwook Oh, Soonhoi Ha
    Rate Optimal VLSI Design from Data Flow Graph. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:118-121 [Conf]
  21. Dohyung Kim, Soonhoi Ha, Rajesh Gupta
    Parallel co-simulation using virtual synchronization with redundant host execution. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1151-1156 [Conf]
  22. Hae-woo Park, Kyoungjoo Oh, Soyoung Park, Myoung-min Sim, Soonhoi Ha
    Dynamic code overlay of SDF-modeled programs on low-end embedded systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:945-946 [Conf]
  23. Wonyong Sung, Soonhoi Ha
    Optimized Timed Hardware Software Cosimulation without Roll-back. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:945-946 [Conf]
  24. Chaeseok Im, Soonhoi Ha
    An Energy Optimization Technique for Latency and Quality Constrained Video Applications. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2003, pp:18-23 [Conf]
  25. Dohyung Kim, Minyoung Kim, Soonhoi Ha
    A Case Study of System Level Specification and Software Synthesis of Multimode Multimedia Terminal. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2003, pp:57-64 [Conf]
  26. Hyunok Oh, Soonhoi Ha
    A Static Scheduling Heuristic for Heterogeneous Processors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. II, 1996, pp:573-577 [Conf]
  27. Chan-Eun Rhee, Han-You Jeong, Soonhoi Ha
    Many-to-Many Core-Switch Mapping in 2-D Mesh NoC Architectures. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:438-443 [Conf]
  28. Sachoun Park, Gihwon Kwon, Soonhoi Ha
    Formalization of fFSM Model and Its Verification. [Citation Graph (0, 0)][DBLP]
    ICESS, 2005, pp:361-372 [Conf]
  29. Hyong-Shik Kim, Soonhoi Ha, Chu Shik Jhon
    Quantitative Analysis on Caching Effect of I-Structure Data in Frame-Based Multithreaded Processing. [Citation Graph (0, 0)][DBLP]
    ICPP, 1997, pp:122-0 [Conf]
  30. Jin-Soo Kim, Soonhoi Ha, Chu Shik Jhon
    Reducing Overheads of Local Communications in Fine-grain Parallel Computation. [Citation Graph (0, 0)][DBLP]
    ICPP, 1997, pp:223-226 [Conf]
  31. Jin-Soo Kim, Soonhoi Ha, Chu Shik Jhon
    Efficient Barrier Synchronization Mechanism for BSP Model on Message Passing Architectures. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1998, pp:255-259 [Conf]
  32. Chaeseok Im, Huiseok Kim, Soonhoi Ha
    Dynamic voltage scheduling technique for low-power multimedia applications using buffers. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:34-39 [Conf]
  33. Soonhoi Ha, Sungchan Kim, Chan-Eun Rhee, Hyunguk Jung, Youngmin Yi, Dohyung Kim
    Virtual Synchronization for Fast Distributed Cosimulation of Dataflow Task Graphs. [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:174-179 [Conf]
  34. Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
    Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design. [Citation Graph (0, 0)][DBLP]
    ISSS, 2000, pp:79-84 [Conf]
  35. Chanik Park, Soonhoi Ha
    Hardware Synthesis from SPDF Representation for Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    ISSS, 2000, pp:215-220 [Conf]
  36. Wonyong Sung, Junedong Kim, Soonhoi Ha
    Memory Efficient Software Synthesis from Dataflow Graph. [Citation Graph (0, 0)][DBLP]
    ISSS, 1998, pp:137-144 [Conf]
  37. Hyunok Oh, Soonhoi Ha
    Fractional rate dataflow model and efficient code synthesis for multimedia applications. [Citation Graph (0, 0)][DBLP]
    LCTES-SCOPES, 2002, pp:12-17 [Conf]
  38. Chaeseok Im, Soonhoi Ha
    Dynamic voltage scaling for real-time multi-task scheduling using buffers. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:88-94 [Conf]
  39. Minyoung Kim, Soonhoi Ha
    Hybrid Run-time Power Management Technique for Real-time Embedded System with Voltage Scalable Processor. [Citation Graph (0, 0)][DBLP]
    LCTES/OM, 2001, pp:11-19 [Conf]
  40. Woo-Chul Jeun, Yang-Suk Kee, Jin-Soo Kim, Soonhoi Ha
    A High Performance and Low Cost Cluster-Based E-mail System. [Citation Graph (0, 0)][DBLP]
    PaCT, 2003, pp:482-496 [Conf]
  41. Yang-Suk Kee, Jin-Soo Kim, Woo-Chul Jeun, Soonhoi Ha
    Atomic Page Update Methods for OpenMP-Aware Software DSM. [Citation Graph (0, 0)][DBLP]
    PDP, 2004, pp:144-151 [Conf]
  42. Chanik Park, JaeWoong Chung, Soonhoi Ha
    Extended Synchronous Dataflow for Efficient DSP System Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:196-0 [Conf]
  43. Soonhoi Ha, Choonseung Lee, Youngmin Yi, Seongnam Kwon, Young-Pyo Joo
    Hardware-Software Codesign of Multimedia Embedded Systems: the PeaCE. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2006, pp:207-214 [Conf]
  44. Yang-Suk Kee, Jin-Soo Kim, Soonhoi Ha
    ParADE: An OpenMP Programming Environment for SMP Cluster Systems. [Citation Graph (0, 0)][DBLP]
    SC, 2003, pp:6- [Conf]
  45. Jin-Soo Kim, Kangho Kim, Sung-In Jung, Soonhoi Ha
    Design and implementation of a user-level Sockets layer over Virtual Interface Architecture. [Citation Graph (0, 0)][DBLP]
    Concurrency and Computation: Practice and Experience, 2003, v:15, n:7-8, pp:727-749 [Journal]
  46. Chaeseok Im, Soonhoi Ha
    Energy Optimization for Latency- and Quality-Constrained Video Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:5, pp:358-366 [Journal]
  47. Joseph Buck, Soonhoi Ha, Edward A. Lee, David G. Messerschmitt
    Ptolemy: A Framework for Simulating and Prototyping Heterogenous Systems. [Citation Graph (0, 0)][DBLP]
    Int. Journal in Computer Simulation, 1994, v:4, n:2, pp:0-0 [Journal]
  48. Jin-Soo Kim, Soonhoi Ha, Chu Shik Jhon
    Relaxed Barrier Synchronization for the BSP Model of Computation on Message-Passing Architectures. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1998, v:66, n:5, pp:247-253 [Journal]
  49. Yang-Suk Kee, Jin-Soo Kim, Soonhoi Ha
    Memory management for multi-threaded software DSM systems. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2004, v:30, n:1, pp:121-138 [Journal]
  50. Yangsuk Kee, Soonhoi Ha
    An Efficient Implementation of the BSP Programming Library for VIA. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 2002, v:12, n:1, pp:65-77 [Journal]
  51. Soonhoi Ha, Edward A. Lee
    Compile-Time Scheduling and Assignment of Data-Flow Program Graphs with Data-Dependent Iteration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:11, pp:1225-1238 [Journal]
  52. Kyoung-Son Jhang, Soonhoi Ha, Chu Shik Jhon
    COP: a Crosstalk OPtimizer for gridded channel routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:4, pp:424-429 [Journal]
  53. Chaeseok Im, Soonhoi Ha, Huiseok Kim
    Dynamic voltage scheduling with buffers in low-power multimedia applications. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2004, v:3, n:4, pp:686-705 [Journal]
  54. Sungchan Kim, Chaeseok Im, Soonhoi Ha
    Schedule-aware performance estimation of communication architecture for efficient design space exploration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:5, pp:539-552 [Journal]
  55. Sungchan Kim, Soonhoi Ha
    Efficient exploration of bus-based system-on-chip architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:7, pp:681-692 [Journal]
  56. Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo Kim, Soonhoi Ha
    Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:53-57 [Conf]
  57. Dohyung Kim, Soonhoi Ha, Rajesh Gupta
    CATS: cycle accurate transaction-driven simulation with multiple processor simulators. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:749-754 [Conf]
  58. Soyoung Park, Hae-woo Park, Soonhoi Ha
    A novel technique to use scratch-pad memory for stack management. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1478-1483 [Conf]
  59. Taewook Oh, Youngmin Yi, Soonhoi Ha
    Communication Architecture Simulation on the Virtual Synchronization Framework. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2007, pp:3-12 [Conf]
  60. Soonhoi Ha, Sungchan Kim, Choonseung Lee, Youngmin Yi, Seongnam Kwon, Young-Pyo Joo
    PeaCE: A hardware-software codesign environment for multimedia embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]
  61. Wonyong Sung, Soonhoi Ha
    Memory efficient software synthesis with mixed coding style from dataflow graphs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:5, pp:522-526 [Journal]
  62. Dohyung Kim, Chan-Eun Rhee, Soonhoi Ha
    Combined data-driven and event-driven scheduling technique for fast distributed cosimulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:5, pp:672-678 [Journal]
  63. Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
    Efficient hardware controller synthesis for synchronous dataflow graph in system level design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:4, pp:423-428 [Journal]

  64. Model-based Programming Environment of Embedded Software for MPSoC. [Citation Graph (, )][DBLP]

  65. Effective OpenMP Implementation and Translation For Multiprocessor System-On-Chip without Using OS. [Citation Graph (, )][DBLP]

  66. Scalable and retargetable simulation techniquesfor multiprocessor systems. [Citation Graph (, )][DBLP]

  67. Architecture Exploration of NAND Flash-based Multimedia Card. [Citation Graph (, )][DBLP]

  68. Pipelined data parallel task mapping/scheduling technique for MPSoC. [Citation Graph (, )][DBLP]

  69. On-chip communication architecture exploration for processor-pool-based MPSoC. [Citation Graph (, )][DBLP]

  70. Programming MPSoC platforms: Road works ahead! [Citation Graph (, )][DBLP]

  71. Performance Analysis of Parallel Execution of H.264 Encoder on the Cell Processor. [Citation Graph (, )][DBLP]

  72. Data-Parallel Code Generation from Synchronous Dataflow Specification of Multimedia Applications. [Citation Graph (, )][DBLP]

  73. Serialized multitasking code generation from dataflow specification. [Citation Graph (, )][DBLP]

  74. Automatic H.264 encoder synthesis for the Cell processor from a target independent specification. [Citation Graph (, )][DBLP]

  75. Introduction. [Citation Graph (, )][DBLP]

  76. A timed HW/SW coemulation technique for fast yet accurate system verification. [Citation Graph (, )][DBLP]

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