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Yukihiro Iguchi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yukihiro Iguchi, Munehiro Matsuura, Tsutomu Sasao, Atsumu Iseno
    Realization of Regular Ternary Logic Functions. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:331-0 [Conf]
  2. Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura, Atsumu Iseno
    A hardware simulation engine based on decision diagrams (short paper). [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:73-76 [Conf]
  3. Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura
    On Decomposition of Kleene TDDs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:234-0 [Conf]
  4. Atsumu Iseno, Yukihiro Iguchi
    A Method for Storing Fail Bit Maps in Burn-in Memory Testers. [Citation Graph (0, 0)][DBLP]
    DELTA, 2002, pp:142-148 [Conf]
  5. Tsutomu Sasao, Yukihiro Iguchi, Takahiro Suzuki
    On LUT Cascade Realizations of FIR Filters. [Citation Graph (0, 0)][DBLP]
    DSD, 2005, pp:467-475 [Conf]
  6. Hui Qin, Tsutomu Sasao, Yukihiro Iguchi
    An FPGA design of AES encryption circuit with 128-bit keys. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:147-151 [Conf]
  7. Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura
    Realization of Multiple-Output Functions by Reconfigurable Cascades. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:388-393 [Conf]
  8. Yukihiro Iguchi, Tsutomu Sasao
    Hardware to Compute Walsh Coefficients. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2005, pp:75-81 [Conf]
  9. Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura
    Implementation of Multiple-Output Functions Using PQMDDs. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2000, pp:199-205 [Conf]
  10. Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura
    A Method to Evaluate Logic Functions in the Presence of Unknown Inputs Using LUT Cascades. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2004, pp:302-308 [Conf]
  11. Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura
    On Designs of Radix Converters Using Arithmetic Decompositions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2006, pp:3- [Conf]
  12. Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, Munehiro Matsuura
    Representations of Logic Functions Using QRMDDs. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2002, pp:261-0 [Conf]
  13. Tsutomu Sasao, Yukihiro Iguchi, Munehiro Matsuura
    Comparison of Decision Diagrams for Multiple-Output Logic Functions. [Citation Graph (0, 0)][DBLP]
    IWLS, 2002, pp:379-384 [Conf]

  14. On the Complexity of Error Detection Functions for Redundant Residue Number Systems. [Citation Graph (, )][DBLP]


  15. On Designs of Radix Converters Using Arithmetic Decompositions--Binary to Decimal Converters--. [Citation Graph (, )][DBLP]


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