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Takumi Uezono:
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 Junpei Inoue, Hiroyuki Ito, Shinichiro Gomi, Takanori Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu
Evaluation of onchip transmission line interconnect using wire length distribution. [Citation Graph (0, 0)][DBLP] ASPDAC, 2005, pp:133138 [Conf]
 Shiho Hagiwara, Takumi Uezono, Takashi Sato, Kazuya Masu
Improvement of power distribution network using correlationbased regression analysis. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2007, pp:513516 [Conf]
 Takumi Uezono, Kenichi Okada, Kazuya Masu
Via Distribution Model for Yield Estimation. [Citation Graph (0, 0)][DBLP] ISQED, 2006, pp:479484 [Conf]
 Takashi Sato, Takumi Uezono, Shiho Hagiwara, Kenichi Okada, Shuhei Amakawa, Noriaki Nakayama, Kazuya Masu
A MOS TransistorArray for Accurate Measurement of Subthreshold Leakage Variation. [Citation Graph (0, 0)][DBLP] ISQED, 2007, pp:2126 [Conf]
 Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu
Wire Length Distribution Model Considering Core Utilization for System on Chip. [Citation Graph (0, 0)][DBLP] ISVLSI, 2005, pp:276277 [Conf]
 Kenichi Okada, Takumi Uezono, Kazuya Masu
Estimation of Power Reduction by OnChip Transmission Line for 45nm Technology. [Citation Graph (0, 0)][DBLP] PATMOS, 2006, pp:181190 [Conf]
 Takumi Uezono, Junpei Inoue, Takanori Kyogoku, Kenichi Okada, Kazuya Masu
Prediction of delay time for future LSI using onchip transmission line interconnects. [Citation Graph (0, 0)][DBLP] SLIP, 2005, pp:712 [Conf]
 Takashi Sato, Shiho Hagiwara, Takumi Uezono, Kazuya Masu
Weakness Identification for Effective Repair of Power Distribution Network. [Citation Graph (0, 0)][DBLP] PATMOS, 2007, pp:222231 [Conf]
 Shuhei Amakawa, Takumi Uezono, Takashi Sato, Kenichi Okada, Kazuya Masu
Adaptable wirelength distribution with tunable occupation probability. [Citation Graph (0, 0)][DBLP] SLIP, 2007, pp:18 [Conf]
An Adaptive Test for Parametric Faults Based on Statistical Timing Information. [Citation Graph (, )][DBLP]
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