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Publications of Author

1. Junpei Inoue, Hiroyuki Ito, Shinichiro Gomi, Takanori Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu
   Evaluation of on-chip transmission line interconnect using wire length distribution. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2005, pp:133-138 [Conf]
   
2. Kenichi Okada, Yoshiaki Yoshihara, Hirotaka Sugawara, Kazuya Masu
   A dynamic reconfigurable RF circuit architecture. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2005, pp:683-686 [Conf]
   
3. Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu
   ULSI Interconnect Length Distribution Model Considering Core Utilization. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:1210-1217 [Conf]
   
4. Takumi Uezono, Kenichi Okada, Kazuya Masu
   Via Distribution Model for Yield Estimation. [Citation Graph (0, 0)][DBLP]
   ISQED, 2006, pp:479-484 [Conf]
   
5. Takashi Sato, Takumi Uezono, Shiho Hagiwara, Kenichi Okada, Shuhei Amakawa, Noriaki Nakayama, Kazuya Masu
   A MOS Transistor-Array for Accurate Measurement of Subthreshold Leakage Variation. [Citation Graph (0, 0)][DBLP]
   ISQED, 2007, pp:21-26 [Conf]
   
6. Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu
   Wire Length Distribution Model Considering Core Utilization for System on Chip. [Citation Graph (0, 0)][DBLP]
   ISVLSI, 2005, pp:276-277 [Conf]
   
7. Kenichi Okada, Takumi Uezono, Kazuya Masu
   Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2006, pp:181-190 [Conf]
   
8. Takumi Uezono, Junpei Inoue, Takanori Kyogoku, Kenichi Okada, Kazuya Masu
   Prediction of delay time for future LSI using on-chip transmission line interconnects. [Citation Graph (0, 0)][DBLP]
   SLIP, 2005, pp:7-12 [Conf]
   
9. Yoshiaki Yoshihara, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
   Inductance-Tuned LC-VCO for Reconfigurable RF Circuit Design. [Citation Graph (0, 0)][DBLP]
   IEICE Electronic Express, 2004, v:1, n:7, pp:156-159 [Journal]
   
10. Yoshiaki Yoshihara, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
    Wide Tuning Range LC-VCO Using Variable Inductor for Reconfigurable RF Circuit. [Citation Graph (0, 0)][DBLP]
    IEICE Transactions, 2005, v:88, n:2, pp:507-512 [Journal]
    
11. D. Kawazoe, Hirotaka Sugawara, T. Ito, Kenichi Okada, Kazuya Masu
    Reconfigurable CMOS low noise amplifier for self compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
12. Shuhei Amakawa, Takumi Uezono, Takashi Sato, Kenichi Okada, Kazuya Masu
    Adaptable wire-length distribution with tunable occupation probability. [Citation Graph (0, 0)][DBLP]
    SLIP, 2007, pp:1-8 [Conf]
    
13. 
    Development of Hi-Speed X.509 Certification Path Validation System. [Citation Graph (, )][DBLP]
    
    
14. 
    A Multi-Drop Transmission-Line Interconnect in Si LSI. [Citation Graph (, )][DBLP]
    
    
15. 
    Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation. [Citation Graph (, )][DBLP]
    
    
16. 
    A Wideband CMOS LC-VCO Using Variable Inductor. [Citation Graph (, )][DBLP]
    
    
17. 
    Small-area CMOS RF distributed mixer using multi-port inductors. [Citation Graph (, )][DBLP]
    
    
18. 
    A CMOS direct sampling mixer using Switched Capacitor Filter technique for software-defined radio. [Citation Graph (, )][DBLP]
    
    
19. 
    LVDS-type on-chip transmision line interconnect with passive equalizers in 90nm CMOS process. [Citation Graph (, )][DBLP]
    
    
20. 
    The study of the knowledge optimization tool. [Citation Graph (, )][DBLP]
    
    
21. 
    Design space exploration of low-phase-noise LC-VCO using multiple-divide technique. [Citation Graph (, )][DBLP]
    
    
22. 
    Construction of Optimized Knowledge and New Knowledge Creation Support Tool. [Citation Graph (, )][DBLP]